2018-03-18 20:15:05 +00:00
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// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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2018-08-10 22:39:37 +00:00
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#include "common/assert.h"
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2019-09-25 23:43:23 +00:00
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#include "common/microprofile.h"
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2019-02-14 17:42:58 +00:00
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#include "core/core.h"
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2019-01-30 02:49:18 +00:00
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#include "core/core_timing.h"
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2020-02-10 14:32:51 +00:00
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#include "core/core_timing_util.h"
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2019-01-30 02:49:18 +00:00
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#include "core/memory.h"
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2018-03-18 20:15:05 +00:00
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#include "video_core/engines/fermi_2d.h"
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2019-01-22 23:49:31 +00:00
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#include "video_core/engines/kepler_compute.h"
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2018-09-08 20:58:20 +00:00
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#include "video_core/engines/kepler_memory.h"
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2018-03-18 20:15:05 +00:00
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#include "video_core/engines/maxwell_3d.h"
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2018-06-10 22:02:33 +00:00
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#include "video_core/engines/maxwell_dma.h"
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2018-03-18 20:15:05 +00:00
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#include "video_core/gpu.h"
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2019-03-04 04:54:16 +00:00
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#include "video_core/memory_manager.h"
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2019-01-08 04:32:02 +00:00
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#include "video_core/renderer_base.h"
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2018-03-18 20:15:05 +00:00
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namespace Tegra {
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2019-09-25 23:43:23 +00:00
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MICROPROFILE_DEFINE(GPU_wait, "GPU", "Wait for the GPU", MP_RGB(128, 128, 192));
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2019-06-10 12:19:27 +00:00
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GPU::GPU(Core::System& system, VideoCore::RendererBase& renderer, bool is_async)
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: system{system}, renderer{renderer}, is_async{is_async} {
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2019-01-08 04:32:02 +00:00
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auto& rasterizer{renderer.Rasterizer()};
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2020-02-15 22:47:15 +00:00
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memory_manager = std::make_unique<Tegra::MemoryManager>(system, rasterizer);
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2018-11-24 04:20:56 +00:00
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dma_pusher = std::make_unique<Tegra::DmaPusher>(*this);
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2019-02-16 03:05:17 +00:00
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maxwell_3d = std::make_unique<Engines::Maxwell3D>(system, rasterizer, *memory_manager);
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2019-08-30 18:08:00 +00:00
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fermi_2d = std::make_unique<Engines::Fermi2D>(rasterizer);
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2019-04-22 23:05:43 +00:00
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kepler_compute = std::make_unique<Engines::KeplerCompute>(system, rasterizer, *memory_manager);
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2019-08-30 18:08:00 +00:00
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maxwell_dma = std::make_unique<Engines::MaxwellDMA>(system, *memory_manager);
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2019-04-22 22:50:56 +00:00
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kepler_memory = std::make_unique<Engines::KeplerMemory>(system, *memory_manager);
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2018-03-18 20:15:05 +00:00
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}
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GPU::~GPU() = default;
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2018-08-28 14:57:56 +00:00
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Engines::Maxwell3D& GPU::Maxwell3D() {
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2018-07-20 22:31:36 +00:00
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return *maxwell_3d;
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}
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2018-08-28 14:57:56 +00:00
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const Engines::Maxwell3D& GPU::Maxwell3D() const {
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2018-03-22 20:19:35 +00:00
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return *maxwell_3d;
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}
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2019-07-15 01:25:13 +00:00
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Engines::KeplerCompute& GPU::KeplerCompute() {
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return *kepler_compute;
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}
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const Engines::KeplerCompute& GPU::KeplerCompute() const {
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return *kepler_compute;
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}
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2018-08-28 14:57:56 +00:00
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MemoryManager& GPU::MemoryManager() {
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return *memory_manager;
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}
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const MemoryManager& GPU::MemoryManager() const {
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return *memory_manager;
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}
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2018-11-24 04:20:56 +00:00
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DmaPusher& GPU::DmaPusher() {
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return *dma_pusher;
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}
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const DmaPusher& GPU::DmaPusher() const {
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return *dma_pusher;
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}
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2019-12-30 12:03:20 +00:00
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void GPU::WaitFence(u32 syncpoint_id, u32 value) {
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2019-09-25 23:43:23 +00:00
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// Synced GPU, is always in sync
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if (!is_async) {
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return;
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}
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MICROPROFILE_SCOPE(GPU_wait);
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2019-12-30 12:03:20 +00:00
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std::unique_lock lock{sync_mutex};
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sync_cv.wait(lock, [=]() { return syncpoints[syncpoint_id].load() >= value; });
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2019-09-25 23:43:23 +00:00
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}
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2019-06-07 16:56:30 +00:00
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void GPU::IncrementSyncPoint(const u32 syncpoint_id) {
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syncpoints[syncpoint_id]++;
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2019-06-18 20:58:29 +00:00
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std::lock_guard lock{sync_mutex};
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2019-12-30 12:03:20 +00:00
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sync_cv.notify_all();
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2019-06-12 11:52:49 +00:00
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if (!syncpt_interrupts[syncpoint_id].empty()) {
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2019-06-07 16:56:30 +00:00
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u32 value = syncpoints[syncpoint_id].load();
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2019-06-12 11:52:49 +00:00
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auto it = syncpt_interrupts[syncpoint_id].begin();
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while (it != syncpt_interrupts[syncpoint_id].end()) {
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if (value >= *it) {
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TriggerCpuInterrupt(syncpoint_id, *it);
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it = syncpt_interrupts[syncpoint_id].erase(it);
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2019-06-07 16:56:30 +00:00
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continue;
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}
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it++;
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}
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}
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}
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u32 GPU::GetSyncpointValue(const u32 syncpoint_id) const {
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return syncpoints[syncpoint_id].load();
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}
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2019-06-12 11:52:49 +00:00
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void GPU::RegisterSyncptInterrupt(const u32 syncpoint_id, const u32 value) {
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2019-06-19 00:53:21 +00:00
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auto& interrupt = syncpt_interrupts[syncpoint_id];
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bool contains = std::any_of(interrupt.begin(), interrupt.end(),
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[value](u32 in_value) { return in_value == value; });
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if (contains) {
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return;
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2019-06-08 00:41:06 +00:00
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}
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2019-06-12 11:52:49 +00:00
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syncpt_interrupts[syncpoint_id].emplace_back(value);
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2019-06-07 16:56:30 +00:00
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}
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2019-06-17 19:27:42 +00:00
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bool GPU::CancelSyncptInterrupt(const u32 syncpoint_id, const u32 value) {
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2019-06-18 20:58:29 +00:00
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std::lock_guard lock{sync_mutex};
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2019-06-19 00:53:21 +00:00
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auto& interrupt = syncpt_interrupts[syncpoint_id];
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const auto iter =
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std::find_if(interrupt.begin(), interrupt.end(),
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[value](u32 interrupt_value) { return value == interrupt_value; });
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if (iter == interrupt.end()) {
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return false;
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2019-06-08 01:13:20 +00:00
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}
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2019-06-19 00:53:21 +00:00
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interrupt.erase(iter);
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return true;
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2019-06-08 01:13:20 +00:00
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}
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2020-02-10 14:32:51 +00:00
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u64 GPU::GetTicks() const {
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2020-02-13 22:16:07 +00:00
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// This values were reversed engineered by fincs from NVN
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// The gpu clock is reported in units of 385/625 nanoseconds
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constexpr u64 gpu_ticks_num = 384;
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constexpr u64 gpu_ticks_den = 625;
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2020-02-10 14:32:51 +00:00
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const u64 cpu_ticks = system.CoreTiming().GetTicks();
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const u64 nanoseconds = Core::Timing::CyclesToNs(cpu_ticks).count();
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2020-02-13 22:16:07 +00:00
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const u64 nanoseconds_num = nanoseconds / gpu_ticks_den;
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const u64 nanoseconds_rem = nanoseconds % gpu_ticks_den;
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return nanoseconds_num * gpu_ticks_num + (nanoseconds_rem * gpu_ticks_num) / gpu_ticks_den;
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2020-02-10 14:32:51 +00:00
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}
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2019-07-26 18:20:43 +00:00
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void GPU::FlushCommands() {
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renderer.Rasterizer().FlushCommands();
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}
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2018-04-25 02:57:10 +00:00
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u32 RenderTargetBytesPerPixel(RenderTargetFormat format) {
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ASSERT(format != RenderTargetFormat::NONE);
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switch (format) {
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2018-06-06 02:07:40 +00:00
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case RenderTargetFormat::RGBA32_FLOAT:
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2018-08-11 18:01:50 +00:00
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case RenderTargetFormat::RGBA32_UINT:
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2018-06-06 02:07:40 +00:00
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return 16;
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2018-08-13 04:04:52 +00:00
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case RenderTargetFormat::RGBA16_UINT:
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2018-08-13 04:34:20 +00:00
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case RenderTargetFormat::RGBA16_UNORM:
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2018-06-06 03:01:20 +00:00
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case RenderTargetFormat::RGBA16_FLOAT:
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2019-09-21 23:40:46 +00:00
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case RenderTargetFormat::RGBX16_FLOAT:
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2018-07-23 23:10:00 +00:00
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case RenderTargetFormat::RG32_FLOAT:
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2018-08-13 12:55:16 +00:00
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case RenderTargetFormat::RG32_UINT:
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2018-06-06 03:01:20 +00:00
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return 8;
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2018-04-25 02:57:10 +00:00
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case RenderTargetFormat::RGBA8_UNORM:
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2018-08-10 15:44:43 +00:00
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case RenderTargetFormat::RGBA8_SNORM:
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2018-08-11 18:01:50 +00:00
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case RenderTargetFormat::RGBA8_SRGB:
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2018-08-20 12:26:54 +00:00
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case RenderTargetFormat::RGBA8_UINT:
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2018-04-25 02:57:10 +00:00
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case RenderTargetFormat::RGB10_A2_UNORM:
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2018-07-23 20:56:52 +00:00
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case RenderTargetFormat::BGRA8_UNORM:
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2018-09-10 03:41:37 +00:00
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case RenderTargetFormat::BGRA8_SRGB:
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2018-08-11 18:01:50 +00:00
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case RenderTargetFormat::RG16_UNORM:
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case RenderTargetFormat::RG16_SNORM:
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case RenderTargetFormat::RG16_UINT:
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case RenderTargetFormat::RG16_SINT:
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case RenderTargetFormat::RG16_FLOAT:
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2018-08-01 13:31:42 +00:00
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case RenderTargetFormat::R32_FLOAT:
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2018-08-08 06:40:04 +00:00
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case RenderTargetFormat::R11G11B10_FLOAT:
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2018-08-13 12:55:16 +00:00
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case RenderTargetFormat::R32_UINT:
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2018-04-25 02:57:10 +00:00
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return 4;
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2018-08-11 18:01:50 +00:00
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case RenderTargetFormat::R16_UNORM:
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case RenderTargetFormat::R16_SNORM:
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case RenderTargetFormat::R16_UINT:
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case RenderTargetFormat::R16_SINT:
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case RenderTargetFormat::R16_FLOAT:
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2018-08-13 03:02:34 +00:00
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case RenderTargetFormat::RG8_UNORM:
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2018-08-10 16:07:37 +00:00
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case RenderTargetFormat::RG8_SNORM:
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2018-08-11 18:01:50 +00:00
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return 2;
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case RenderTargetFormat::R8_UNORM:
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2018-08-12 01:44:42 +00:00
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case RenderTargetFormat::R8_UINT:
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2018-08-11 18:01:50 +00:00
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return 1;
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2018-04-25 02:57:10 +00:00
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default:
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2018-04-27 11:54:05 +00:00
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UNIMPLEMENTED_MSG("Unimplemented render target format {}", static_cast<u32>(format));
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2018-12-19 01:52:32 +00:00
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return 1;
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2018-04-25 02:57:10 +00:00
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}
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}
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2018-08-11 18:01:50 +00:00
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u32 DepthFormatBytesPerPixel(DepthFormat format) {
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switch (format) {
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case DepthFormat::Z32_S8_X24_FLOAT:
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return 8;
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case DepthFormat::Z32_FLOAT:
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case DepthFormat::S8_Z24_UNORM:
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case DepthFormat::Z24_X8_UNORM:
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case DepthFormat::Z24_S8_UNORM:
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case DepthFormat::Z24_C8_UNORM:
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return 4;
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case DepthFormat::Z16_UNORM:
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return 2;
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default:
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UNIMPLEMENTED_MSG("Unimplemented Depth format {}", static_cast<u32>(format));
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2018-12-19 01:52:32 +00:00
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return 1;
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2018-08-11 18:01:50 +00:00
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}
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}
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2019-01-30 02:49:18 +00:00
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// Note that, traditionally, methods are treated as 4-byte addressable locations, and hence
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// their numbers are written down multiplied by 4 in Docs. Here we are not multiply by 4.
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// So the values you see in docs might be multiplied by 4.
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2018-11-24 04:20:56 +00:00
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enum class BufferMethods {
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2019-01-30 02:49:18 +00:00
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BindObject = 0x0,
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Nop = 0x2,
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SemaphoreAddressHigh = 0x4,
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SemaphoreAddressLow = 0x5,
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SemaphoreSequence = 0x6,
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SemaphoreTrigger = 0x7,
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NotifyIntr = 0x8,
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WrcacheFlush = 0x9,
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Unk28 = 0xA,
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2019-07-18 12:54:42 +00:00
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UnkCacheFlush = 0xB,
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2019-01-30 02:49:18 +00:00
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RefCnt = 0x14,
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SemaphoreAcquire = 0x1A,
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SemaphoreRelease = 0x1B,
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2019-07-18 12:54:42 +00:00
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FenceValue = 0x1C,
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FenceAction = 0x1D,
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2019-01-30 02:49:18 +00:00
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Unk78 = 0x1E,
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Unk7c = 0x1F,
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Yield = 0x20,
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NonPullerMethods = 0x40,
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};
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enum class GpuSemaphoreOperation {
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AcquireEqual = 0x1,
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WriteLong = 0x2,
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AcquireGequal = 0x4,
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AcquireMask = 0x8,
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2018-11-24 04:20:56 +00:00
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};
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void GPU::CallMethod(const MethodCall& method_call) {
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2018-12-01 07:05:19 +00:00
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LOG_TRACE(HW_GPU, "Processing method {:08X} on subchannel {}", method_call.method,
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method_call.subchannel);
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2018-11-24 04:20:56 +00:00
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ASSERT(method_call.subchannel < bound_engines.size());
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2019-01-30 02:49:18 +00:00
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if (ExecuteMethodOnEngine(method_call)) {
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CallEngineMethod(method_call);
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} else {
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CallPullerMethod(method_call);
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2018-11-24 04:20:56 +00:00
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}
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2019-01-30 02:49:18 +00:00
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}
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bool GPU::ExecuteMethodOnEngine(const MethodCall& method_call) {
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const auto method = static_cast<BufferMethods>(method_call.method);
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return method >= BufferMethods::NonPullerMethods;
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}
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2018-11-24 04:20:56 +00:00
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2019-01-30 02:49:18 +00:00
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void GPU::CallPullerMethod(const MethodCall& method_call) {
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regs.reg_array[method_call.method] = method_call.argument;
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const auto method = static_cast<BufferMethods>(method_call.method);
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switch (method) {
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case BufferMethods::BindObject: {
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ProcessBindMethod(method_call);
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break;
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}
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case BufferMethods::Nop:
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case BufferMethods::SemaphoreAddressHigh:
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case BufferMethods::SemaphoreAddressLow:
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case BufferMethods::SemaphoreSequence:
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case BufferMethods::RefCnt:
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2019-07-18 12:54:42 +00:00
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case BufferMethods::UnkCacheFlush:
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case BufferMethods::WrcacheFlush:
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case BufferMethods::FenceValue:
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case BufferMethods::FenceAction:
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2019-01-30 02:49:18 +00:00
|
|
|
break;
|
|
|
|
case BufferMethods::SemaphoreTrigger: {
|
|
|
|
ProcessSemaphoreTriggerMethod();
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case BufferMethods::NotifyIntr: {
|
|
|
|
// TODO(Kmather73): Research and implement this method.
|
|
|
|
LOG_ERROR(HW_GPU, "Special puller engine method NotifyIntr not implemented");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case BufferMethods::Unk28: {
|
|
|
|
// TODO(Kmather73): Research and implement this method.
|
|
|
|
LOG_ERROR(HW_GPU, "Special puller engine method Unk28 not implemented");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case BufferMethods::SemaphoreAcquire: {
|
|
|
|
ProcessSemaphoreAcquire();
|
|
|
|
break;
|
2018-12-04 04:52:18 +00:00
|
|
|
}
|
2019-01-30 02:49:18 +00:00
|
|
|
case BufferMethods::SemaphoreRelease: {
|
|
|
|
ProcessSemaphoreRelease();
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case BufferMethods::Yield: {
|
|
|
|
// TODO(Kmather73): Research and implement this method.
|
|
|
|
LOG_ERROR(HW_GPU, "Special puller engine method Yield not implemented");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
LOG_ERROR(HW_GPU, "Special puller engine method {:X} not implemented",
|
|
|
|
static_cast<u32>(method));
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2018-12-04 04:52:18 +00:00
|
|
|
|
2019-01-30 02:49:18 +00:00
|
|
|
void GPU::CallEngineMethod(const MethodCall& method_call) {
|
2018-11-24 04:20:56 +00:00
|
|
|
const EngineID engine = bound_engines[method_call.subchannel];
|
|
|
|
|
|
|
|
switch (engine) {
|
|
|
|
case EngineID::FERMI_TWOD_A:
|
|
|
|
fermi_2d->CallMethod(method_call);
|
|
|
|
break;
|
|
|
|
case EngineID::MAXWELL_B:
|
|
|
|
maxwell_3d->CallMethod(method_call);
|
|
|
|
break;
|
2019-01-22 23:49:31 +00:00
|
|
|
case EngineID::KEPLER_COMPUTE_B:
|
|
|
|
kepler_compute->CallMethod(method_call);
|
2018-11-24 04:20:56 +00:00
|
|
|
break;
|
|
|
|
case EngineID::MAXWELL_DMA_COPY_A:
|
|
|
|
maxwell_dma->CallMethod(method_call);
|
|
|
|
break;
|
|
|
|
case EngineID::KEPLER_INLINE_TO_MEMORY_B:
|
|
|
|
kepler_memory->CallMethod(method_call);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
UNIMPLEMENTED_MSG("Unimplemented engine");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2019-01-30 02:49:18 +00:00
|
|
|
void GPU::ProcessBindMethod(const MethodCall& method_call) {
|
|
|
|
// Bind the current subchannel to the desired engine id.
|
|
|
|
LOG_DEBUG(HW_GPU, "Binding subchannel {} to engine {}", method_call.subchannel,
|
|
|
|
method_call.argument);
|
|
|
|
bound_engines[method_call.subchannel] = static_cast<EngineID>(method_call.argument);
|
|
|
|
}
|
|
|
|
|
|
|
|
void GPU::ProcessSemaphoreTriggerMethod() {
|
|
|
|
const auto semaphoreOperationMask = 0xF;
|
|
|
|
const auto op =
|
|
|
|
static_cast<GpuSemaphoreOperation>(regs.semaphore_trigger & semaphoreOperationMask);
|
|
|
|
if (op == GpuSemaphoreOperation::WriteLong) {
|
|
|
|
struct Block {
|
|
|
|
u32 sequence;
|
|
|
|
u32 zeros = 0;
|
|
|
|
u64 timestamp;
|
|
|
|
};
|
|
|
|
|
|
|
|
Block block{};
|
|
|
|
block.sequence = regs.semaphore_sequence;
|
|
|
|
// TODO(Kmather73): Generate a real GPU timestamp and write it here instead of
|
|
|
|
// CoreTiming
|
2020-02-10 14:32:51 +00:00
|
|
|
block.timestamp = GetTicks();
|
2019-03-27 16:12:53 +00:00
|
|
|
memory_manager->WriteBlock(regs.semaphore_address.SemaphoreAddress(), &block,
|
|
|
|
sizeof(block));
|
2019-01-30 02:49:18 +00:00
|
|
|
} else {
|
2019-03-27 16:12:53 +00:00
|
|
|
const u32 word{memory_manager->Read<u32>(regs.semaphore_address.SemaphoreAddress())};
|
2019-01-30 02:49:18 +00:00
|
|
|
if ((op == GpuSemaphoreOperation::AcquireEqual && word == regs.semaphore_sequence) ||
|
|
|
|
(op == GpuSemaphoreOperation::AcquireGequal &&
|
|
|
|
static_cast<s32>(word - regs.semaphore_sequence) > 0) ||
|
|
|
|
(op == GpuSemaphoreOperation::AcquireMask && (word & regs.semaphore_sequence))) {
|
|
|
|
// Nothing to do in this case
|
|
|
|
} else {
|
|
|
|
regs.acquire_source = true;
|
|
|
|
regs.acquire_value = regs.semaphore_sequence;
|
|
|
|
if (op == GpuSemaphoreOperation::AcquireEqual) {
|
|
|
|
regs.acquire_active = true;
|
|
|
|
regs.acquire_mode = false;
|
|
|
|
} else if (op == GpuSemaphoreOperation::AcquireGequal) {
|
|
|
|
regs.acquire_active = true;
|
|
|
|
regs.acquire_mode = true;
|
|
|
|
} else if (op == GpuSemaphoreOperation::AcquireMask) {
|
|
|
|
// TODO(kemathe) The acquire mask operation waits for a value that, ANDed with
|
|
|
|
// semaphore_sequence, gives a non-0 result
|
|
|
|
LOG_ERROR(HW_GPU, "Invalid semaphore operation AcquireMask not implemented");
|
|
|
|
} else {
|
|
|
|
LOG_ERROR(HW_GPU, "Invalid semaphore operation");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void GPU::ProcessSemaphoreRelease() {
|
2019-03-27 16:12:53 +00:00
|
|
|
memory_manager->Write<u32>(regs.semaphore_address.SemaphoreAddress(), regs.semaphore_release);
|
2019-01-30 02:49:18 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void GPU::ProcessSemaphoreAcquire() {
|
2019-03-27 16:12:53 +00:00
|
|
|
const u32 word = memory_manager->Read<u32>(regs.semaphore_address.SemaphoreAddress());
|
2019-01-30 02:49:18 +00:00
|
|
|
const auto value = regs.semaphore_acquire;
|
|
|
|
if (word != value) {
|
|
|
|
regs.acquire_active = true;
|
|
|
|
regs.acquire_value = value;
|
|
|
|
// TODO(kemathe73) figure out how to do the acquire_timeout
|
|
|
|
regs.acquire_mode = false;
|
|
|
|
regs.acquire_source = false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-03-18 20:15:05 +00:00
|
|
|
} // namespace Tegra
|