vk_graphics_pipeline: Initial implementation
This abstractio represents the state of the 3D engine at a given draw. Instead of changing individual bits of the pipeline how it's done in APIs like D3D11, OpenGL and NVN; on Vulkan we are forced to put everything together into a single, immutable object. It takes advantage of the few dynamic states Vulkan offers.
This commit is contained in:
ReinUsesLisp
parent
dc96a59fa0
commit
2effdeb924
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@ -161,6 +161,8 @@ if (ENABLE_VULKAN)
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renderer_vulkan/vk_descriptor_pool.h
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renderer_vulkan/vk_device.cpp
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renderer_vulkan/vk_device.h
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renderer_vulkan/vk_graphics_pipeline.cpp
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renderer_vulkan/vk_graphics_pipeline.h
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renderer_vulkan/vk_image.cpp
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renderer_vulkan/vk_image.h
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renderer_vulkan/vk_memory_manager.cpp
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@ -0,0 +1,271 @@
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// Copyright 2019 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <vector>
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "common/microprofile.h"
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#include "video_core/renderer_vulkan/declarations.h"
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#include "video_core/renderer_vulkan/fixed_pipeline_state.h"
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#include "video_core/renderer_vulkan/maxwell_to_vk.h"
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#include "video_core/renderer_vulkan/vk_descriptor_pool.h"
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#include "video_core/renderer_vulkan/vk_device.h"
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#include "video_core/renderer_vulkan/vk_graphics_pipeline.h"
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#include "video_core/renderer_vulkan/vk_pipeline_cache.h"
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#include "video_core/renderer_vulkan/vk_renderpass_cache.h"
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#include "video_core/renderer_vulkan/vk_scheduler.h"
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#include "video_core/renderer_vulkan/vk_update_descriptor.h"
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namespace Vulkan {
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MICROPROFILE_DECLARE(Vulkan_PipelineCache);
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namespace {
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vk::StencilOpState GetStencilFaceState(const FixedPipelineState::StencilFace& face) {
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return vk::StencilOpState(MaxwellToVK::StencilOp(face.action_stencil_fail),
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MaxwellToVK::StencilOp(face.action_depth_pass),
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MaxwellToVK::StencilOp(face.action_depth_fail),
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MaxwellToVK::ComparisonOp(face.test_func), 0, 0, 0);
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}
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bool SupportsPrimitiveRestart(vk::PrimitiveTopology topology) {
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static constexpr std::array unsupported_topologies = {
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vk::PrimitiveTopology::ePointList,
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vk::PrimitiveTopology::eLineList,
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vk::PrimitiveTopology::eTriangleList,
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vk::PrimitiveTopology::eLineListWithAdjacency,
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vk::PrimitiveTopology::eTriangleListWithAdjacency,
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vk::PrimitiveTopology::ePatchList};
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return std::find(std::begin(unsupported_topologies), std::end(unsupported_topologies),
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topology) == std::end(unsupported_topologies);
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}
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} // Anonymous namespace
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VKGraphicsPipeline::VKGraphicsPipeline(const VKDevice& device, VKScheduler& scheduler,
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VKDescriptorPool& descriptor_pool,
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VKUpdateDescriptorQueue& update_descriptor_queue,
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VKRenderPassCache& renderpass_cache,
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const GraphicsPipelineCacheKey& key,
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const std::vector<vk::DescriptorSetLayoutBinding>& bindings,
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const SPIRVProgram& program)
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: device{device}, scheduler{scheduler}, fixed_state{key.fixed_state}, hash{key.Hash()},
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descriptor_set_layout{CreateDescriptorSetLayout(bindings)},
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descriptor_allocator{descriptor_pool, *descriptor_set_layout},
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update_descriptor_queue{update_descriptor_queue}, layout{CreatePipelineLayout()},
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descriptor_template{CreateDescriptorUpdateTemplate(program)}, modules{CreateShaderModules(
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program)},
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renderpass{renderpass_cache.GetRenderPass(key.renderpass_params)}, pipeline{CreatePipeline(
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key.renderpass_params,
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program)} {}
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VKGraphicsPipeline::~VKGraphicsPipeline() = default;
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vk::DescriptorSet VKGraphicsPipeline::CommitDescriptorSet() {
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if (!descriptor_template) {
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return {};
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}
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const auto set = descriptor_allocator.Commit(scheduler.GetFence());
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update_descriptor_queue.Send(*descriptor_template, set);
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return set;
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}
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UniqueDescriptorSetLayout VKGraphicsPipeline::CreateDescriptorSetLayout(
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const std::vector<vk::DescriptorSetLayoutBinding>& bindings) const {
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const vk::DescriptorSetLayoutCreateInfo descriptor_set_layout_ci(
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{}, static_cast<u32>(bindings.size()), bindings.data());
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const auto dev = device.GetLogical();
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const auto& dld = device.GetDispatchLoader();
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return dev.createDescriptorSetLayoutUnique(descriptor_set_layout_ci, nullptr, dld);
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}
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UniquePipelineLayout VKGraphicsPipeline::CreatePipelineLayout() const {
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const vk::PipelineLayoutCreateInfo pipeline_layout_ci({}, 1, &*descriptor_set_layout, 0,
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nullptr);
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const auto dev = device.GetLogical();
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const auto& dld = device.GetDispatchLoader();
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return dev.createPipelineLayoutUnique(pipeline_layout_ci, nullptr, dld);
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}
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UniqueDescriptorUpdateTemplate VKGraphicsPipeline::CreateDescriptorUpdateTemplate(
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const SPIRVProgram& program) const {
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std::vector<vk::DescriptorUpdateTemplateEntry> template_entries;
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u32 binding = 0;
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u32 offset = 0;
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for (const auto& stage : program) {
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if (stage) {
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FillDescriptorUpdateTemplateEntries(device, stage->entries, binding, offset,
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template_entries);
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}
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}
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if (template_entries.empty()) {
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// If the shader doesn't use descriptor sets, skip template creation.
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return UniqueDescriptorUpdateTemplate{};
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}
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const vk::DescriptorUpdateTemplateCreateInfo template_ci(
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{}, static_cast<u32>(template_entries.size()), template_entries.data(),
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vk::DescriptorUpdateTemplateType::eDescriptorSet, *descriptor_set_layout,
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vk::PipelineBindPoint::eGraphics, *layout, DESCRIPTOR_SET);
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const auto dev = device.GetLogical();
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const auto& dld = device.GetDispatchLoader();
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return dev.createDescriptorUpdateTemplateUnique(template_ci, nullptr, dld);
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}
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std::vector<UniqueShaderModule> VKGraphicsPipeline::CreateShaderModules(
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const SPIRVProgram& program) const {
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std::vector<UniqueShaderModule> modules;
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const auto dev = device.GetLogical();
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const auto& dld = device.GetDispatchLoader();
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for (std::size_t i = 0; i < Maxwell::MaxShaderStage; ++i) {
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const auto& stage = program[i];
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if (!stage) {
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continue;
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}
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const vk::ShaderModuleCreateInfo module_ci({}, stage->code.size() * sizeof(u32),
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stage->code.data());
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modules.emplace_back(dev.createShaderModuleUnique(module_ci, nullptr, dld));
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}
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return modules;
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}
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UniquePipeline VKGraphicsPipeline::CreatePipeline(const RenderPassParams& renderpass_params,
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const SPIRVProgram& program) const {
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const auto& vi = fixed_state.vertex_input;
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const auto& ia = fixed_state.input_assembly;
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const auto& ds = fixed_state.depth_stencil;
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const auto& cd = fixed_state.color_blending;
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const auto& ts = fixed_state.tessellation;
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const auto& rs = fixed_state.rasterizer;
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std::vector<vk::VertexInputBindingDescription> vertex_bindings;
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std::vector<vk::VertexInputBindingDivisorDescriptionEXT> vertex_binding_divisors;
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for (std::size_t i = 0; i < vi.num_bindings; ++i) {
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const auto& binding = vi.bindings[i];
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const bool instanced = binding.divisor != 0;
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const auto rate = instanced ? vk::VertexInputRate::eInstance : vk::VertexInputRate::eVertex;
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vertex_bindings.emplace_back(binding.index, binding.stride, rate);
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if (instanced) {
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vertex_binding_divisors.emplace_back(binding.index, binding.divisor);
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}
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}
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std::vector<vk::VertexInputAttributeDescription> vertex_attributes;
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const auto& input_attributes = program[0]->entries.attributes;
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for (std::size_t i = 0; i < vi.num_attributes; ++i) {
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const auto& attribute = vi.attributes[i];
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if (input_attributes.find(attribute.index) == input_attributes.end()) {
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// Skip attributes not used by the vertex shaders.
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continue;
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}
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vertex_attributes.emplace_back(attribute.index, attribute.buffer,
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MaxwellToVK::VertexFormat(attribute.type, attribute.size),
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attribute.offset);
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}
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vk::PipelineVertexInputStateCreateInfo vertex_input_ci(
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{}, static_cast<u32>(vertex_bindings.size()), vertex_bindings.data(),
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static_cast<u32>(vertex_attributes.size()), vertex_attributes.data());
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const vk::PipelineVertexInputDivisorStateCreateInfoEXT vertex_input_divisor_ci(
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static_cast<u32>(vertex_binding_divisors.size()), vertex_binding_divisors.data());
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if (!vertex_binding_divisors.empty()) {
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vertex_input_ci.pNext = &vertex_input_divisor_ci;
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}
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const auto primitive_topology = MaxwellToVK::PrimitiveTopology(device, ia.topology);
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const vk::PipelineInputAssemblyStateCreateInfo input_assembly_ci(
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{}, primitive_topology,
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ia.primitive_restart_enable && SupportsPrimitiveRestart(primitive_topology));
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const vk::PipelineTessellationStateCreateInfo tessellation_ci({}, ts.patch_control_points);
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const vk::PipelineViewportStateCreateInfo viewport_ci({}, Maxwell::NumViewports, nullptr,
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Maxwell::NumViewports, nullptr);
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// TODO(Rodrigo): Find out what's the default register value for front face
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const vk::PipelineRasterizationStateCreateInfo rasterizer_ci(
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{}, rs.depth_clamp_enable, false, vk::PolygonMode::eFill,
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rs.cull_enable ? MaxwellToVK::CullFace(rs.cull_face) : vk::CullModeFlagBits::eNone,
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rs.cull_enable ? MaxwellToVK::FrontFace(rs.front_face) : vk::FrontFace::eCounterClockwise,
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rs.depth_bias_enable, 0.0f, 0.0f, 0.0f, 1.0f);
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const vk::PipelineMultisampleStateCreateInfo multisampling_ci(
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{}, vk::SampleCountFlagBits::e1, false, 0.0f, nullptr, false, false);
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const vk::CompareOp depth_test_compare = ds.depth_test_enable
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? MaxwellToVK::ComparisonOp(ds.depth_test_function)
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: vk::CompareOp::eAlways;
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const vk::PipelineDepthStencilStateCreateInfo depth_stencil_ci(
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{}, ds.depth_test_enable, ds.depth_write_enable, depth_test_compare, ds.depth_bounds_enable,
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ds.stencil_enable, GetStencilFaceState(ds.front_stencil),
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GetStencilFaceState(ds.back_stencil), 0.0f, 0.0f);
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std::array<vk::PipelineColorBlendAttachmentState, Maxwell::NumRenderTargets> cb_attachments;
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const std::size_t num_attachments =
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std::min(cd.attachments_count, renderpass_params.color_attachments.size());
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for (std::size_t i = 0; i < num_attachments; ++i) {
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constexpr std::array component_table{
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vk::ColorComponentFlagBits::eR, vk::ColorComponentFlagBits::eG,
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vk::ColorComponentFlagBits::eB, vk::ColorComponentFlagBits::eA};
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const auto& blend = cd.attachments[i];
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vk::ColorComponentFlags color_components{};
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for (std::size_t j = 0; j < component_table.size(); ++j) {
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if (blend.components[j])
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color_components |= component_table[j];
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}
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cb_attachments[i] = vk::PipelineColorBlendAttachmentState(
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blend.enable, MaxwellToVK::BlendFactor(blend.src_rgb_func),
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MaxwellToVK::BlendFactor(blend.dst_rgb_func),
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MaxwellToVK::BlendEquation(blend.rgb_equation),
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MaxwellToVK::BlendFactor(blend.src_a_func), MaxwellToVK::BlendFactor(blend.dst_a_func),
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MaxwellToVK::BlendEquation(blend.a_equation), color_components);
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}
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const vk::PipelineColorBlendStateCreateInfo color_blending_ci({}, false, vk::LogicOp::eCopy,
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static_cast<u32>(num_attachments),
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cb_attachments.data(), {});
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constexpr std::array dynamic_states = {
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vk::DynamicState::eViewport, vk::DynamicState::eScissor,
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vk::DynamicState::eDepthBias, vk::DynamicState::eBlendConstants,
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vk::DynamicState::eDepthBounds, vk::DynamicState::eStencilCompareMask,
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vk::DynamicState::eStencilWriteMask, vk::DynamicState::eStencilReference};
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const vk::PipelineDynamicStateCreateInfo dynamic_state_ci(
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{}, static_cast<u32>(dynamic_states.size()), dynamic_states.data());
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vk::PipelineShaderStageRequiredSubgroupSizeCreateInfoEXT subgroup_size_ci;
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subgroup_size_ci.requiredSubgroupSize = GuestWarpSize;
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std::vector<vk::PipelineShaderStageCreateInfo> shader_stages;
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std::size_t module_index = 0;
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for (std::size_t stage = 0; stage < Maxwell::MaxShaderStage; ++stage) {
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if (!program[stage]) {
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continue;
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}
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const auto stage_enum = static_cast<Tegra::Engines::ShaderType>(stage);
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const auto vk_stage = MaxwellToVK::ShaderStage(stage_enum);
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auto& stage_ci = shader_stages.emplace_back(vk::PipelineShaderStageCreateFlags{}, vk_stage,
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*modules[module_index++], "main", nullptr);
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if (program[stage]->entries.uses_warps && device.IsGuestWarpSizeSupported(vk_stage)) {
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stage_ci.pNext = &subgroup_size_ci;
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}
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}
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const vk::GraphicsPipelineCreateInfo create_info(
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{}, static_cast<u32>(shader_stages.size()), shader_stages.data(), &vertex_input_ci,
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&input_assembly_ci, &tessellation_ci, &viewport_ci, &rasterizer_ci, &multisampling_ci,
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&depth_stencil_ci, &color_blending_ci, &dynamic_state_ci, *layout, renderpass, 0, {}, 0);
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const auto dev = device.GetLogical();
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const auto& dld = device.GetDispatchLoader();
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return dev.createGraphicsPipelineUnique(nullptr, create_info, nullptr, dld);
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}
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} // namespace Vulkan
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@ -0,0 +1,90 @@
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// Copyright 2019 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <array>
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#include <memory>
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#include <optional>
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#include <unordered_map>
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#include <vector>
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/renderer_vulkan/declarations.h"
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#include "video_core/renderer_vulkan/fixed_pipeline_state.h"
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#include "video_core/renderer_vulkan/vk_descriptor_pool.h"
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#include "video_core/renderer_vulkan/vk_renderpass_cache.h"
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#include "video_core/renderer_vulkan/vk_resource_manager.h"
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#include "video_core/renderer_vulkan/vk_shader_decompiler.h"
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namespace Vulkan {
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using Maxwell = Tegra::Engines::Maxwell3D::Regs;
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struct GraphicsPipelineCacheKey;
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class VKDescriptorPool;
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class VKDevice;
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class VKRenderPassCache;
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class VKScheduler;
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class VKUpdateDescriptorQueue;
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using SPIRVProgram = std::array<std::optional<SPIRVShader>, Maxwell::MaxShaderStage>;
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class VKGraphicsPipeline final {
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public:
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explicit VKGraphicsPipeline(const VKDevice& device, VKScheduler& scheduler,
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VKDescriptorPool& descriptor_pool,
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VKUpdateDescriptorQueue& update_descriptor_queue,
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VKRenderPassCache& renderpass_cache,
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const GraphicsPipelineCacheKey& key,
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const std::vector<vk::DescriptorSetLayoutBinding>& bindings,
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const SPIRVProgram& program);
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~VKGraphicsPipeline();
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vk::DescriptorSet CommitDescriptorSet();
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vk::Pipeline GetHandle() const {
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return *pipeline;
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}
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vk::PipelineLayout GetLayout() const {
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return *layout;
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}
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vk::RenderPass GetRenderPass() const {
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return renderpass;
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}
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private:
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UniqueDescriptorSetLayout CreateDescriptorSetLayout(
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const std::vector<vk::DescriptorSetLayoutBinding>& bindings) const;
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UniquePipelineLayout CreatePipelineLayout() const;
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UniqueDescriptorUpdateTemplate CreateDescriptorUpdateTemplate(
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const SPIRVProgram& program) const;
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std::vector<UniqueShaderModule> CreateShaderModules(const SPIRVProgram& program) const;
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UniquePipeline CreatePipeline(const RenderPassParams& renderpass_params,
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const SPIRVProgram& program) const;
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const VKDevice& device;
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VKScheduler& scheduler;
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const FixedPipelineState fixed_state;
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const u64 hash;
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UniqueDescriptorSetLayout descriptor_set_layout;
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DescriptorAllocator descriptor_allocator;
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VKUpdateDescriptorQueue& update_descriptor_queue;
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UniquePipelineLayout layout;
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UniqueDescriptorUpdateTemplate descriptor_template;
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std::vector<UniqueShaderModule> modules;
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vk::RenderPass renderpass;
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UniquePipeline pipeline;
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};
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} // namespace Vulkan
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@ -8,9 +8,12 @@
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#include <cstddef>
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#include <vector>
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#include <boost/functional/hash.hpp>
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#include "common/common_types.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/renderer_vulkan/declarations.h"
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#include "video_core/renderer_vulkan/fixed_pipeline_state.h"
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#include "video_core/renderer_vulkan/vk_shader_decompiler.h"
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#include "video_core/shader/shader_ir.h"
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@ -18,6 +21,28 @@ namespace Vulkan {
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class VKDevice;
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using Maxwell = Tegra::Engines::Maxwell3D::Regs;
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struct GraphicsPipelineCacheKey {
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FixedPipelineState fixed_state;
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std::array<GPUVAddr, Maxwell::MaxShaderProgram> shaders;
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RenderPassParams renderpass_params;
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std::size_t Hash() const noexcept {
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std::size_t hash = fixed_state.Hash();
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for (const auto& shader : shaders) {
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boost::hash_combine(hash, shader);
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}
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boost::hash_combine(hash, renderpass_params.Hash());
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return hash;
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}
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bool operator==(const GraphicsPipelineCacheKey& rhs) const noexcept {
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return std::tie(fixed_state, shaders, renderpass_params) ==
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std::tie(rhs.fixed_state, rhs.shaders, rhs.renderpass_params);
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}
|
||||
};
|
||||
|
||||
struct ComputePipelineCacheKey {
|
||||
GPUVAddr shader{};
|
||||
u32 shared_memory_size{};
|
||||
|
|
@ -41,6 +66,13 @@ struct ComputePipelineCacheKey {
|
|||
|
||||
namespace std {
|
||||
|
||||
template <>
|
||||
struct hash<Vulkan::GraphicsPipelineCacheKey> {
|
||||
std::size_t operator()(const Vulkan::GraphicsPipelineCacheKey& k) const noexcept {
|
||||
return k.Hash();
|
||||
}
|
||||
};
|
||||
|
||||
template <>
|
||||
struct hash<Vulkan::ComputePipelineCacheKey> {
|
||||
std::size_t operator()(const Vulkan::ComputePipelineCacheKey& k) const noexcept {
|
||||
|
|
|
|||
Loading…
Reference in New Issue