core: Define HAS_NCE macro
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@ -926,7 +926,8 @@ if (ENABLE_WEB_SERVICE)
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target_link_libraries(core PRIVATE web_service)
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endif()
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if (ARCHITECTURE_arm64)
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if (ARCHITECTURE_arm64 AND (ANDROID OR ${CMAKE_SYSTEM_NAME} STREQUAL "Linux"))
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target_compile_definitions(core PRIVATE -DHAS_NCE)
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enable_language(C ASM)
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set(CMAKE_ASM_FLAGS "${CFLAGS} -x assembler-with-cpp")
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@ -6,7 +6,7 @@
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namespace Core {
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#ifdef ARCHITECTURE_arm64
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#ifdef HAS_NCE
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constexpr size_t VirtualReserveSize = 1ULL << 38;
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#else
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constexpr size_t VirtualReserveSize = 1ULL << 39;
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@ -75,6 +75,7 @@ struct CodeSet final {
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return segments[2];
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}
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#ifdef HAS_NCE
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Segment& PatchSegment() {
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return patch_segment;
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}
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@ -82,13 +83,17 @@ struct CodeSet final {
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const Segment& PatchSegment() const {
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return patch_segment;
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}
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#endif
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/// The overall data that backs this code set.
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Kernel::PhysicalMemory memory;
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/// The segments that comprise this code set.
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std::array<Segment, 3> segments;
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#ifdef HAS_NCE
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Segment patch_segment;
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#endif
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/// The entry point address for this code set.
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KProcessAddress entrypoint = 0;
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@ -25,7 +25,7 @@ constexpr std::array<KAddressSpaceInfo, 13> AddressSpaceInfos{{
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{ .bit_width = 36, .address = 2_GiB , .size = 64_GiB - 2_GiB , .type = KAddressSpaceInfo::Type::MapLarge, },
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{ .bit_width = 36, .address = Size_Invalid, .size = 8_GiB , .type = KAddressSpaceInfo::Type::Heap, },
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{ .bit_width = 36, .address = Size_Invalid, .size = 6_GiB , .type = KAddressSpaceInfo::Type::Alias, },
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#ifdef ARCHITECTURE_arm64
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#ifdef HAS_NCE
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// With NCE, we use a 38-bit address space due to memory limitations. This should (safely) truncate ASLR region.
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{ .bit_width = 39, .address = 128_MiB , .size = 256_GiB - 128_MiB, .type = KAddressSpaceInfo::Type::Map39Bit, },
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#else
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@ -96,7 +96,7 @@ constexpr Common::MemoryPermission ConvertToMemoryPermission(KMemoryPermission p
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if (True(perm & KMemoryPermission::UserWrite)) {
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perms |= Common::MemoryPermission::Write;
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}
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#ifdef ARCHITECTURE_arm64
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#ifdef HAS_NCE
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if (True(perm & KMemoryPermission::UserExecute)) {
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perms |= Common::MemoryPermission::Execute;
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}
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@ -112,7 +112,6 @@ private:
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std::array<KThread*, Core::Hardware::NUM_CPU_CORES> m_pinned_threads{};
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std::array<DebugWatchpoint, Core::Hardware::NUM_WATCHPOINTS> m_watchpoints{};
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std::map<KProcessAddress, u64> m_debug_page_refcounts{};
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std::unordered_map<u64, u64> m_post_handlers{};
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std::atomic<s64> m_cpu_time{};
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std::atomic<s64> m_num_process_switches{};
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std::atomic<s64> m_num_thread_switches{};
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@ -121,6 +120,9 @@ private:
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std::atomic<s64> m_num_ipc_messages{};
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std::atomic<s64> m_num_ipc_replies{};
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std::atomic<s64> m_num_ipc_receives{};
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#ifdef HAS_NCE
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std::unordered_map<u64, u64> m_post_handlers{};
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#endif
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private:
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Result StartTermination();
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@ -468,9 +470,11 @@ public:
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static void Switch(KProcess* cur_process, KProcess* next_process);
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#ifdef HAS_NCE
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std::unordered_map<u64, u64>& GetPostHandlers() noexcept {
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return m_post_handlers;
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}
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#endif
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public:
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// Attempts to insert a watchpoint into a free slot. Returns false if none are available.
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@ -4,7 +4,7 @@
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#include "common/settings.h"
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#include "core/arm/dynarmic/arm_dynarmic_32.h"
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#include "core/arm/dynarmic/arm_dynarmic_64.h"
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#ifdef ARCHITECTURE_arm64
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#ifdef HAS_NCE
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#include "core/arm/nce/arm_nce.h"
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#endif
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#include "core/core.h"
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@ -33,7 +33,7 @@ PhysicalCore::PhysicalCore(std::size_t core_index, Core::System& system, KSchedu
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PhysicalCore::~PhysicalCore() = default;
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void PhysicalCore::Initialize(bool is_64_bit) {
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#if defined(ARCHITECTURE_arm64)
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#if defined(HAS_NCE)
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if (Settings::IsNceEnabled()) {
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m_arm_interface = std::make_unique<Core::ARM_NCE>(m_system, m_system.Kernel().IsMulticore(),
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m_core_index);
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@ -15,7 +15,7 @@
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#include "core/loader/deconstructed_rom_directory.h"
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#include "core/loader/nso.h"
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#ifdef ARCHITECTURE_arm64
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#ifdef HAS_NCE
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#include "core/arm/nce/patch.h"
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#endif
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@ -141,12 +141,12 @@ AppLoader_DeconstructedRomDirectory::LoadResult AppLoader_DeconstructedRomDirect
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std::size_t code_size{};
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// Define an nce patch context for each potential module.
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#ifdef ARCHITECTURE_arm64
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#ifdef HAS_NCE
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std::array<Core::NCE::Patcher, 13> module_patchers;
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#endif
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const auto GetPatcher = [&](size_t i) -> Core::NCE::Patcher* {
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#ifdef ARCHITECTURE_arm64
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#ifdef HAS_NCE
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if (Settings::IsNceEnabled()) {
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return &module_patchers[i];
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}
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@ -22,7 +22,7 @@
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#include "core/loader/nso.h"
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#include "core/memory.h"
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#ifdef ARCHITECTURE_arm64
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#ifdef HAS_NCE
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#include "core/arm/nce/patch.h"
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#endif
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@ -201,7 +201,7 @@ static bool LoadNroImpl(Core::System& system, Kernel::KProcess& process,
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program_image.resize(static_cast<u32>(program_image.size()) + bss_size);
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size_t image_size = program_image.size();
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#ifdef ARCHITECTURE_arm64
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#ifdef HAS_NCE
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const auto& code = codeset.CodeSegment();
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// NROs always have a 39-bit address space.
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@ -247,7 +247,7 @@ static bool LoadNroImpl(Core::System& system, Kernel::KProcess& process,
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// Relocate code patch and copy to the program_image if running under NCE.
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// This needs to be after LoadFromMetadata so we can use the process entry point.
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#ifdef ARCHITECTURE_arm64
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#ifdef HAS_NCE
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if (Settings::IsNceEnabled()) {
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patch.RelocateAndCopy(process.GetEntryPoint(), code, program_image,
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&process.GetPostHandlers());
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@ -20,7 +20,7 @@
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#include "core/loader/nso.h"
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#include "core/memory.h"
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#ifdef ARCHITECTURE_arm64
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#ifdef HAS_NCE
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#include "core/arm/nce/patch.h"
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#endif
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@ -93,7 +93,7 @@ std::optional<VAddr> AppLoader_NSO::LoadModule(Kernel::KProcess& process, Core::
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// Allocate some space at the beginning if we are patching in PreText mode.
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const size_t module_start = [&]() -> size_t {
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#ifdef ARCHITECTURE_arm64
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#ifdef HAS_NCE
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if (patch && patch->GetPatchMode() == Core::NCE::PatchMode::PreText) {
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return patch->GetSectionSize();
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}
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@ -155,7 +155,7 @@ std::optional<VAddr> AppLoader_NSO::LoadModule(Kernel::KProcess& process, Core::
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std::copy(pi_header.begin() + sizeof(NSOHeader), pi_header.end(), program_image.data());
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}
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#ifdef ARCHITECTURE_arm64
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#ifdef HAS_NCE
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// If we are computing the process code layout and using nce backend, patch.
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const auto& code = codeset.CodeSegment();
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if (patch && patch->GetPatchMode() == Core::NCE::PatchMode::None) {
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