Merge branch 'hle-interface-updates'
This commit is contained in:
bunnei
commit
438dba40c1
@ -159,9 +159,4 @@ enum EMUSTATE_CHANGE
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EMUSTATE_CHANGE_STOP
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};
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// This should be used in the private: declarations for a class
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#define DISALLOW_COPY_AND_ASSIGN(TypeName) \
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TypeName(const TypeName&); \
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void operator=(const TypeName&)
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#endif // _COMMON_H_
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@ -18,6 +18,7 @@ set(SRCS core.cpp
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file_sys/directory_file_system.cpp
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file_sys/meta_file_system.cpp
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hle/hle.cpp
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hle/mrc.cpp
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hle/syscall.cpp
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hle/service/apt.cpp
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hle/service/gsp.cpp
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@ -8,7 +8,7 @@
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#include "common/common_types.h"
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/// Generic ARM11 CPU interface
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class ARM_Interface {
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class ARM_Interface : NonCopyable {
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public:
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ARM_Interface() {
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m_num_instructions = 0;
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@ -75,5 +75,4 @@ private:
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u64 m_num_instructions; ///< Number of instructions executed
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DISALLOW_COPY_AND_ASSIGN(ARM_Interface);
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};
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@ -63,5 +63,4 @@ private:
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ARMul_State* m_state;
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DISALLOW_COPY_AND_ASSIGN(ARM_Interpreter);
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};
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@ -4467,7 +4467,6 @@ ARMul_Emulate26 (ARMul_State * state)
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}
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/* Drop through. */
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case 0xe0:
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case 0xe4:
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case 0xe6:
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case 0xe8:
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@ -4502,6 +4501,7 @@ ARMul_Emulate26 (ARMul_State * state)
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/* Co-Processor Register Transfers (MRC) and Data Ops. */
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case 0xe0:
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case 0xe1:
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case 0xe3:
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case 0xe5:
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@ -17,9 +17,11 @@
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#include "armdefs.h"
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#include "armemu.h"
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//#include "ansidecl.h"
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#include "skyeye_defs.h"
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#include "core/hle/hle.h"
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#include "core/hle/mrc.h"
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#include "core/arm/disassembler/arm_disasm.h"
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unsigned xscale_cp15_cp_access_allowed (ARMul_State * state, unsigned reg,
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unsigned cpnum);
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@ -736,7 +738,8 @@ ARMword
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ARMul_MRC (ARMul_State * state, ARMword instr)
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{
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unsigned cpab;
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ARMword result = HLE::CallGetThreadCommandBuffer();
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ARMword result = HLE::CallMRC((HLE::ARM11_MRC_OPERATION)BITS(20, 27));
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////printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
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//if (!CP_ACCESS_ALLOWED (state, CPNum)) {
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@ -846,7 +849,10 @@ ARMul_CDP (ARMul_State * state, ARMword instr)
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void
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ARMul_UndefInstr (ARMul_State * state, ARMword instr)
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{
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ERROR_LOG(ARM11, "Undefined instruction!! Instr: 0x%x", instr);
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char buff[512];
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ARM_Disasm disasm = ARM_Disasm();
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disasm.disasm(state->pc, instr, buff);
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ERROR_LOG(ARM11, "Undefined instruction!! Disasm: %s Opcode: 0x%x", buff, instr);
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ARMul_Abort (state, ARMul_UndefinedInstrV);
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}
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@ -153,6 +153,7 @@
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<ClCompile Include="file_sys\directory_file_system.cpp" />
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<ClCompile Include="file_sys\meta_file_system.cpp" />
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<ClCompile Include="hle\hle.cpp" />
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<ClCompile Include="hle\mrc.cpp" />
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<ClCompile Include="hle\service\apt.cpp" />
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<ClCompile Include="hle\service\gsp.cpp" />
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<ClCompile Include="hle\service\hid.cpp" />
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@ -192,6 +193,7 @@
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<ClInclude Include="file_sys\meta_file_system.h" />
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<ClInclude Include="hle\function_wrappers.h" />
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<ClInclude Include="hle\hle.h" />
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<ClInclude Include="hle\mrc.h" />
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<ClInclude Include="hle\service\apt.h" />
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<ClInclude Include="hle\service\gsp.h" />
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<ClInclude Include="hle\service\hid.h" />
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@ -105,6 +105,9 @@
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<ClCompile Include="hw\lcd.cpp">
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<Filter>hw</Filter>
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</ClCompile>
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<ClCompile Include="hle\mrc.cpp">
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<Filter>hle</Filter>
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</ClCompile>
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</ItemGroup>
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<ItemGroup>
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<ClInclude Include="arm\disassembler\arm_disasm.h">
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@ -205,6 +208,9 @@
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<ClInclude Include="hw\lcd.h">
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<Filter>hw</Filter>
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</ClInclude>
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<ClInclude Include="hle\mrc.h">
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<Filter>hle</Filter>
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</ClInclude>
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</ItemGroup>
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<ItemGroup>
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<Text Include="CMakeLists.txt" />
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@ -80,14 +80,6 @@ void CallSyscall(u32 opcode) {
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}
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}
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/// Returns the coprocessor (in this case, syscore) command buffer pointer
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Addr CallGetThreadCommandBuffer() {
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// Called on insruction: mrc p15, 0, r0, c13, c0, 3
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// Returns an address in OSHLE memory for the CPU to read/write to
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RETURN(CMD_BUFFER_ADDR);
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return CMD_BUFFER_ADDR;
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}
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void RegisterModule(std::string name, int num_functions, const FunctionDef* func_table) {
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ModuleDef module = {name, num_functions, func_table};
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g_module_db.push_back(module);
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@ -57,8 +57,6 @@ void RegisterModule(std::string name, int num_functions, const FunctionDef *func
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void CallSyscall(u32 opcode);
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Addr CallGetThreadCommandBuffer();
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void Init();
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void Shutdown();
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64
src/core/hle/mrc.cpp
Normal file
64
src/core/hle/mrc.cpp
Normal file
@ -0,0 +1,64 @@
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// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#include "core/hle/mrc.h"
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#include "core/hle/hle.h"
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#include "core/mem_map.h"
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#include "core/core.h"
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namespace HLE {
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enum {
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CMD_GX_REQUEST_DMA = 0x00000000,
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};
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/// Data synchronization barrier
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u32 DataSynchronizationBarrier(u32* command_buffer) {
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u32 command = command_buffer[0];
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switch (command) {
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case CMD_GX_REQUEST_DMA:
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{
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u32* src = (u32*)Memory::GetPointer(command_buffer[1]);
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u32* dst = (u32*)Memory::GetPointer(command_buffer[2]);
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u32 size = command_buffer[3];
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memcpy(dst, src, size);
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}
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break;
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default:
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ERROR_LOG(OSHLE, "MRC::DataSynchronizationBarrier unknown command 0x%08X", command);
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return -1;
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}
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return 0;
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}
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/// Returns the coprocessor (in this case, syscore) command buffer pointer
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Addr GetThreadCommandBuffer() {
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// Called on insruction: mrc p15, 0, r0, c13, c0, 3
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// Returns an address in OSHLE memory for the CPU to read/write to
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RETURN(CMD_BUFFER_ADDR);
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return CMD_BUFFER_ADDR;
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}
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/// Call an MRC operation in HLE
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u32 CallMRC(ARM11_MRC_OPERATION operation) {
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switch (operation) {
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case DATA_SYNCHRONIZATION_BARRIER:
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return DataSynchronizationBarrier((u32*)Memory::GetPointer(PARAM(0)));
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case CALL_GET_THREAD_COMMAND_BUFFER:
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return GetThreadCommandBuffer();
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default:
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ERROR_LOG(OSHLE, "unimplemented MRC operation 0x%02X", operation);
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break;
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}
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return -1;
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}
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} // namespace
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20
src/core/hle/mrc.h
Normal file
20
src/core/hle/mrc.h
Normal file
@ -0,0 +1,20 @@
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// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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#pragma once
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#include "common/common_types.h"
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namespace HLE {
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/// MRC operations (ARM register from coprocessor), decoded as instr[20:27]
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enum ARM11_MRC_OPERATION {
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DATA_SYNCHRONIZATION_BARRIER = 0xE0,
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CALL_GET_THREAD_COMMAND_BUFFER = 0xE1,
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};
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/// Call an MRC operation in HLE
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u32 CallMRC(ARM11_MRC_OPERATION operation);
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} // namespace
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@ -13,16 +13,16 @@
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namespace APT_U {
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void Initialize() {
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void Initialize(Service::Interface* self) {
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NOTICE_LOG(OSHLE, "APT_U::Sync - Initialize");
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}
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void GetLockHandle() {
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void GetLockHandle(Service::Interface* self) {
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u32* cmd_buff = (u32*)HLE::GetPointer(HLE::CMD_BUFFER_ADDR + Service::kCommandHeaderOffset);
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cmd_buff[5] = 0x00000000; // TODO: This should be an actual mutex handle
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}
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const HLE::FunctionDef FunctionTable[] = {
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const Interface::FunctionInfo FunctionTable[] = {
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{0x00010040, GetLockHandle, "GetLockHandle"},
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{0x00020080, Initialize, "Initialize"},
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{0x00030040, NULL, "Enable"},
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@ -32,10 +32,6 @@ public:
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std::string GetPortName() const {
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return "APT:U";
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}
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private:
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DISALLOW_COPY_AND_ASSIGN(Interface);
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};
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} // namespace
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@ -5,45 +5,96 @@
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#include "common/log.h"
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#include "core/mem_map.h"
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#include "core/hle/hle.h"
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#include "core/hle/service/gsp.h"
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#include "core/hw/lcd.h"
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////////////////////////////////////////////////////////////////////////////////////////////////////
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// Namespace GSP_GPU
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namespace GSP_GPU {
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const HLE::FunctionDef FunctionTable[] = {
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{0x00010082, NULL, "WriteHWRegs"},
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{0x00020084, NULL, "WriteHWRegsWithMask"},
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{0x00030082, NULL, "WriteHWRegRepeat"},
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{0x00040080, NULL, "ReadHWRegs"},
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{0x00050200, NULL, "SetBufferSwap"},
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{0x00060082, NULL, "SetCommandList"},
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{0x000700C2, NULL, "RequestDma"},
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{0x00080082, NULL, "FlushDataCache"},
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{0x00090082, NULL, "InvalidateDataCache"},
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{0x000A0044, NULL, "RegisterInterruptEvents"},
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{0x000B0040, NULL, "SetLcdForceBlack"},
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{0x000C0000, NULL, "TriggerCmdReqQueue"},
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{0x000D0140, NULL, "SetDisplayTransfer"},
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{0x000E0180, NULL, "SetTextureCopy"},
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{0x000F0200, NULL, "SetMemoryFill"},
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{0x00100040, NULL, "SetAxiConfigQoSMode"},
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{0x00110040, NULL, "SetPerfLogMode"},
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{0x00120000, NULL, "GetPerfLog"},
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{0x00130042, NULL, "RegisterInterruptRelayQueue"},
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{0x00140000, NULL, "UnregisterInterruptRelayQueue"},
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{0x00150002, NULL, "TryAcquireRight"},
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{0x00160042, NULL, "AcquireRight"},
|
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{0x00170000, NULL, "ReleaseRight"},
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{0x00180000, NULL, "ImportDisplayCaptureInfo"},
|
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{0x00190000, NULL, "SaveVramSysArea"},
|
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{0x001A0000, NULL, "RestoreVramSysArea"},
|
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{0x001B0000, NULL, "ResetGpuCore"},
|
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{0x001C0040, NULL, "SetLedForceOff"},
|
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{0x001D0040, NULL, "SetTestCommand"},
|
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{0x001E0080, NULL, "SetInternalPriorities"},
|
||||
enum {
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||||
REG_FRAMEBUFFER_1 = 0x00400468,
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REG_FRAMEBUFFER_2 = 0x00400494,
|
||||
};
|
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|
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/// Read a GSP GPU hardware register
|
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void ReadHWRegs(Service::Interface* self) {
|
||||
static const u32 framebuffer_1[] = {LCD::PADDR_VRAM_TOP_LEFT_FRAME1, LCD::PADDR_VRAM_TOP_RIGHT_FRAME1};
|
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static const u32 framebuffer_2[] = {LCD::PADDR_VRAM_TOP_LEFT_FRAME2, LCD::PADDR_VRAM_TOP_RIGHT_FRAME2};
|
||||
|
||||
u32* cmd_buff = (u32*)HLE::GetPointer(HLE::CMD_BUFFER_ADDR + Service::kCommandHeaderOffset);
|
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u32 reg_addr = cmd_buff[1];
|
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u32 size = cmd_buff[2];
|
||||
u32* dst = (u32*)Memory::GetPointer(cmd_buff[0x41]);
|
||||
|
||||
switch (reg_addr) {
|
||||
|
||||
// NOTE: Calling SetFramebufferLocation here is a hack... Not sure the correct way yet to set
|
||||
// whether the framebuffers should be in VRAM or GSP heap, but from what I understand, if the
|
||||
// user application is reading from either of these registers, then its going to be in VRAM.
|
||||
|
||||
// Top framebuffer 1 addresses
|
||||
case REG_FRAMEBUFFER_1:
|
||||
LCD::SetFramebufferLocation(LCD::FRAMEBUFFER_LOCATION_VRAM);
|
||||
memcpy(dst, framebuffer_1, size);
|
||||
break;
|
||||
|
||||
// Top framebuffer 2 addresses
|
||||
case REG_FRAMEBUFFER_2:
|
||||
LCD::SetFramebufferLocation(LCD::FRAMEBUFFER_LOCATION_VRAM);
|
||||
memcpy(dst, framebuffer_2, size);
|
||||
break;
|
||||
|
||||
default:
|
||||
ERROR_LOG(OSHLE, "GSP_GPU::ReadHWRegs unknown register read at address %08X", reg_addr);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void RegisterInterruptRelayQueue(Service::Interface* self) {
|
||||
u32* cmd_buff = (u32*)HLE::GetPointer(HLE::CMD_BUFFER_ADDR + Service::kCommandHeaderOffset);
|
||||
u32 flags = cmd_buff[1];
|
||||
u32 event_handle = cmd_buff[3]; // TODO(bunnei): Implement event handling
|
||||
cmd_buff[4] = self->NewHandle();
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
const Interface::FunctionInfo FunctionTable[] = {
|
||||
{0x00010082, NULL, "WriteHWRegs"},
|
||||
{0x00020084, NULL, "WriteHWRegsWithMask"},
|
||||
{0x00030082, NULL, "WriteHWRegRepeat"},
|
||||
{0x00040080, ReadHWRegs, "ReadHWRegs"},
|
||||
{0x00050200, NULL, "SetBufferSwap"},
|
||||
{0x00060082, NULL, "SetCommandList"},
|
||||
{0x000700C2, NULL, "RequestDma"},
|
||||
{0x00080082, NULL, "FlushDataCache"},
|
||||
{0x00090082, NULL, "InvalidateDataCache"},
|
||||
{0x000A0044, NULL, "RegisterInterruptEvents"},
|
||||
{0x000B0040, NULL, "SetLcdForceBlack"},
|
||||
{0x000C0000, NULL, "TriggerCmdReqQueue"},
|
||||
{0x000D0140, NULL, "SetDisplayTransfer"},
|
||||
{0x000E0180, NULL, "SetTextureCopy"},
|
||||
{0x000F0200, NULL, "SetMemoryFill"},
|
||||
{0x00100040, NULL, "SetAxiConfigQoSMode"},
|
||||
{0x00110040, NULL, "SetPerfLogMode"},
|
||||
{0x00120000, NULL, "GetPerfLog"},
|
||||
{0x00130042, RegisterInterruptRelayQueue, "RegisterInterruptRelayQueue"},
|
||||
{0x00140000, NULL, "UnregisterInterruptRelayQueue"},
|
||||
{0x00150002, NULL, "TryAcquireRight"},
|
||||
{0x00160042, NULL, "AcquireRight"},
|
||||
{0x00170000, NULL, "ReleaseRight"},
|
||||
{0x00180000, NULL, "ImportDisplayCaptureInfo"},
|
||||
{0x00190000, NULL, "SaveVramSysArea"},
|
||||
{0x001A0000, NULL, "RestoreVramSysArea"},
|
||||
{0x001B0000, NULL, "ResetGpuCore"},
|
||||
{0x001C0040, NULL, "SetLedForceOff"},
|
||||
{0x001D0040, NULL, "SetTestCommand"},
|
||||
{0x001E0080, NULL, "SetInternalPriorities"},
|
||||
};
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
@ -27,9 +27,6 @@ public:
|
||||
return "gsp::Gpu";
|
||||
}
|
||||
|
||||
private:
|
||||
|
||||
DISALLOW_COPY_AND_ASSIGN(Interface);
|
||||
};
|
||||
|
||||
} // namespace
|
||||
|
||||
@ -12,7 +12,7 @@
|
||||
|
||||
namespace HID_User {
|
||||
|
||||
const HLE::FunctionDef FunctionTable[] = {
|
||||
const Interface::FunctionInfo FunctionTable[] = {
|
||||
{0x000A0000, NULL, "GetIPCHandles"},
|
||||
{0x00110000, NULL, "EnableAccelerometer"},
|
||||
{0x00130000, NULL, "EnableGyroscopeLow"},
|
||||
|
||||
@ -29,9 +29,6 @@ public:
|
||||
return "hid:USER";
|
||||
}
|
||||
|
||||
private:
|
||||
|
||||
DISALLOW_COPY_AND_ASSIGN(Interface);
|
||||
};
|
||||
|
||||
} // namespace
|
||||
|
||||
@ -25,7 +25,7 @@ static const int kCommandHeaderOffset = 0x80; ///< Offset into command buffer
|
||||
class Manager;
|
||||
|
||||
/// Interface to a CTROS service
|
||||
class Interface {
|
||||
class Interface : NonCopyable {
|
||||
friend class Manager;
|
||||
public:
|
||||
|
||||
@ -35,6 +35,14 @@ public:
|
||||
virtual ~Interface() {
|
||||
}
|
||||
|
||||
typedef void (*Function)(Interface*);
|
||||
|
||||
struct FunctionInfo {
|
||||
u32 id;
|
||||
Function func;
|
||||
std::string name;
|
||||
};
|
||||
|
||||
/**
|
||||
* Gets the UID for the serice
|
||||
* @return UID of service in native format
|
||||
@ -51,6 +59,23 @@ public:
|
||||
return "[UNKNOWN SERVICE PORT]";
|
||||
}
|
||||
|
||||
/// Allocates a new handle for the service
|
||||
Syscall::Handle NewHandle() {
|
||||
Syscall::Handle handle = (m_handles.size() << 16) | m_uid;
|
||||
m_handles.push_back(handle);
|
||||
return handle;
|
||||
}
|
||||
|
||||
/// Frees a handle from the service
|
||||
void DeleteHandle(Syscall::Handle handle) {
|
||||
for(auto iter = m_handles.begin(); iter != m_handles.end(); ++iter) {
|
||||
if(*iter == handle) {
|
||||
m_handles.erase(iter);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Called when svcSendSyncRequest is called, loads command buffer and executes comand
|
||||
* @return Return result of svcSendSyncRequest passed back to user app
|
||||
@ -70,16 +95,17 @@ public:
|
||||
return -1;
|
||||
}
|
||||
|
||||
itr->second.func();
|
||||
itr->second.func(this);
|
||||
|
||||
return 0; // TODO: Implement return from actual function
|
||||
}
|
||||
|
||||
protected:
|
||||
|
||||
/**
|
||||
* Registers the functions in the service
|
||||
*/
|
||||
void Register(const HLE::FunctionDef* functions, int len) {
|
||||
void Register(const FunctionInfo* functions, int len) {
|
||||
for (int i = 0; i < len; i++) {
|
||||
m_functions[functions[i].id] = functions[i];
|
||||
}
|
||||
@ -87,9 +113,9 @@ protected:
|
||||
|
||||
private:
|
||||
u32 m_uid;
|
||||
std::map<u32, HLE::FunctionDef> m_functions;
|
||||
|
||||
DISALLOW_COPY_AND_ASSIGN(Interface);
|
||||
|
||||
std::vector<Syscall::Handle> m_handles;
|
||||
std::map<u32, FunctionInfo> m_functions;
|
||||
};
|
||||
|
||||
/// Simple class to manage accessing services from ports and UID handles
|
||||
@ -126,8 +152,6 @@ private:
|
||||
|
||||
std::vector<Interface*> m_services;
|
||||
std::map<std::string, u32> m_port_map;
|
||||
|
||||
DISALLOW_COPY_AND_ASSIGN(Manager);
|
||||
};
|
||||
|
||||
/// Initialize ServiceManager
|
||||
|
||||
@ -12,11 +12,11 @@
|
||||
|
||||
namespace SRV {
|
||||
|
||||
void Initialize() {
|
||||
void Initialize(Service::Interface* self) {
|
||||
NOTICE_LOG(OSHLE, "SRV::Sync - Initialize");
|
||||
}
|
||||
|
||||
void GetServiceHandle() {
|
||||
void GetServiceHandle(Service::Interface* self) {
|
||||
Syscall::Result res = 0;
|
||||
u32* cmd_buff = (u32*)HLE::GetPointer(HLE::CMD_BUFFER_ADDR + Service::kCommandHeaderOffset);
|
||||
|
||||
@ -37,7 +37,7 @@ void GetServiceHandle() {
|
||||
//return res;
|
||||
}
|
||||
|
||||
const HLE::FunctionDef FunctionTable[] = {
|
||||
const Interface::FunctionInfo FunctionTable[] = {
|
||||
{0x00010002, Initialize, "Initialize"},
|
||||
{0x00020000, NULL, "GetProcSemaphore"},
|
||||
{0x00030100, NULL, "RegisterService"},
|
||||
|
||||
@ -32,9 +32,6 @@ public:
|
||||
*/
|
||||
Syscall::Result Sync();
|
||||
|
||||
private:
|
||||
|
||||
DISALLOW_COPY_AND_ASSIGN(Interface);
|
||||
};
|
||||
|
||||
} // namespace
|
||||
|
||||
@ -15,14 +15,29 @@
|
||||
|
||||
namespace Syscall {
|
||||
|
||||
enum ControlMemoryOperation {
|
||||
MEMORY_OPERATION_HEAP = 0x00000003,
|
||||
MEMORY_OPERATION_GSP_HEAP = 0x00010003,
|
||||
};
|
||||
|
||||
enum MapMemoryPermission {
|
||||
MEMORY_PERMISSION_UNMAP = 0x00000000,
|
||||
MEMORY_PERMISSION_NORMAL = 0x00000001,
|
||||
};
|
||||
|
||||
/// Map application or GSP heap memory
|
||||
Result ControlMemory(void* outaddr, u32 addr0, u32 addr1, u32 size, u32 operation, u32 permissions) {
|
||||
Result ControlMemory(u32 operation, u32 addr0, u32 addr1, u32 size, u32 permissions) {
|
||||
u32 virtual_address = 0x00000000;
|
||||
|
||||
switch (operation) {
|
||||
|
||||
// Map GSP heap memory?
|
||||
case 0x00010003:
|
||||
// Map normal heap memory
|
||||
case MEMORY_OPERATION_HEAP:
|
||||
virtual_address = Memory::MapBlock_Heap(size, operation, permissions);
|
||||
break;
|
||||
|
||||
// Map GSP heap memory
|
||||
case MEMORY_OPERATION_GSP_HEAP:
|
||||
virtual_address = Memory::MapBlock_HeapGSP(size, operation, permissions);
|
||||
break;
|
||||
|
||||
@ -31,7 +46,22 @@ Result ControlMemory(void* outaddr, u32 addr0, u32 addr1, u32 size, u32 operatio
|
||||
ERROR_LOG(OSHLE, "Unknown ControlMemory operation %08X", operation);
|
||||
}
|
||||
|
||||
Core::g_app_core->SetReg(1, Memory::MapBlock_HeapGSP(size, operation, permissions));
|
||||
Core::g_app_core->SetReg(1, virtual_address);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/// Maps a memory block to specified address
|
||||
Result MapMemoryBlock(Handle memblock, u32 addr, u32 mypermissions, u32 otherpermission) {
|
||||
int x = 0;
|
||||
switch (mypermissions) {
|
||||
case MEMORY_PERMISSION_NORMAL:
|
||||
case MEMORY_PERMISSION_NORMAL + 1:
|
||||
case MEMORY_PERMISSION_NORMAL + 2:
|
||||
Memory::MapBlock_Shared(memblock, addr, mypermissions);
|
||||
break;
|
||||
default:
|
||||
ERROR_LOG(OSHLE, "Unknown MapMemoryBlock permissions %08X", mypermissions);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -63,7 +93,7 @@ Result WaitSynchronization1(Handle handle, s64 nanoseconds) {
|
||||
|
||||
const HLE::FunctionDef Syscall_Table[] = {
|
||||
{0x00, NULL, "Unknown"},
|
||||
{0x01, WrapI_VUUUUU<ControlMemory>, "ControlMemory"},
|
||||
{0x01, WrapI_UUUUU<ControlMemory>, "ControlMemory"},
|
||||
{0x02, NULL, "QueryMemory"},
|
||||
{0x03, NULL, "ExitProcess"},
|
||||
{0x04, NULL, "GetProcessAffinityMask"},
|
||||
@ -93,7 +123,7 @@ const HLE::FunctionDef Syscall_Table[] = {
|
||||
{0x1C, NULL, "CancelTimer"},
|
||||
{0x1D, NULL, "ClearTimer"},
|
||||
{0x1E, NULL, "CreateMemoryBlock"},
|
||||
{0x1F, NULL, "MapMemoryBlock"},
|
||||
{0x1F, WrapI_UUUU<MapMemoryBlock>, "MapMemoryBlock"},
|
||||
{0x20, NULL, "UnmapMemoryBlock"},
|
||||
{0x21, NULL, "CreateAddressArbiter"},
|
||||
{0x22, NULL, "ArbitrateAddress"},
|
||||
|
||||
@ -12,49 +12,42 @@
|
||||
namespace HW {
|
||||
|
||||
enum {
|
||||
ADDRESS_CONFIG = 0x10000000,
|
||||
ADDRESS_IRQ = 0x10001000,
|
||||
ADDRESS_NDMA = 0x10002000,
|
||||
ADDRESS_TIMER = 0x10003000,
|
||||
ADDRESS_CTRCARD = 0x10004000,
|
||||
ADDRESS_CTRCARD_2 = 0x10005000,
|
||||
ADDRESS_SDMC_NAND = 0x10006000,
|
||||
ADDRESS_SDMC_NAND_2 = 0x10007000, // Apparently not used on retail
|
||||
ADDRESS_PXI = 0x10008000,
|
||||
ADDRESS_AES = 0x10009000,
|
||||
ADDRESS_SHA = 0x1000A000,
|
||||
ADDRESS_RSA = 0x1000B000,
|
||||
ADDRESS_XDMA = 0x1000C000,
|
||||
ADDRESS_SPICARD = 0x1000D800,
|
||||
ADDRESS_CONFIG_2 = 0x10010000,
|
||||
ADDRESS_HASH = 0x10101000,
|
||||
ADDRESS_CSND = 0x10103000,
|
||||
ADDRESS_DSP = 0x10140000,
|
||||
ADDRESS_PDN = 0x10141000,
|
||||
ADDRESS_CODEC = 0x10141000,
|
||||
ADDRESS_SPI = 0x10142000,
|
||||
ADDRESS_SPI_2 = 0x10143000,
|
||||
ADDRESS_I2C = 0x10144000,
|
||||
ADDRESS_CODEC_2 = 0x10145000,
|
||||
ADDRESS_HID = 0x10146000,
|
||||
ADDRESS_PAD = 0x10146000,
|
||||
ADDRESS_PTM = 0x10146000,
|
||||
ADDRESS_I2C_2 = 0x10148000,
|
||||
ADDRESS_SPI_3 = 0x10160000,
|
||||
ADDRESS_I2C_3 = 0x10161000,
|
||||
ADDRESS_MIC = 0x10162000,
|
||||
ADDRESS_PXI_2 = 0x10163000,
|
||||
ADDRESS_NTRCARD = 0x10164000,
|
||||
ADDRESS_DSP_2 = 0x10203000,
|
||||
ADDRESS_HASH_2 = 0x10301000,
|
||||
VADDR_HASH = 0x1EC01000,
|
||||
VADDR_CSND = 0x1EC03000,
|
||||
VADDR_DSP = 0x1EC40000,
|
||||
VADDR_PDN = 0x1EC41000,
|
||||
VADDR_CODEC = 0x1EC41000,
|
||||
VADDR_SPI = 0x1EC42000,
|
||||
VADDR_SPI_2 = 0x1EC43000, // Only used under TWL_FIRM?
|
||||
VADDR_I2C = 0x1EC44000,
|
||||
VADDR_CODEC_2 = 0x1EC45000,
|
||||
VADDR_HID = 0x1EC46000,
|
||||
VADDR_PAD = 0x1EC46000,
|
||||
VADDR_PTM = 0x1EC46000,
|
||||
VADDR_GPIO = 0x1EC47000,
|
||||
VADDR_I2C_2 = 0x1EC48000,
|
||||
VADDR_SPI_3 = 0x1EC60000,
|
||||
VADDR_I2C_3 = 0x1EC61000,
|
||||
VADDR_MIC = 0x1EC62000,
|
||||
VADDR_PXI = 0x1EC63000, // 0xFFFD2000
|
||||
//VADDR_NTRCARD
|
||||
VADDR_CDMA = 0xFFFDA000, // CoreLink DMA-330? Info
|
||||
VADDR_DSP_2 = 0x1ED03000,
|
||||
VADDR_HASH_2 = 0x1EE01000,
|
||||
VADDR_LCD = 0x1EF00000,
|
||||
};
|
||||
|
||||
template <typename T>
|
||||
inline void Read(T &var, const u32 addr) {
|
||||
switch (addr & 0xFFFFF000) {
|
||||
|
||||
case ADDRESS_NDMA:
|
||||
NDMA::Read(var, addr);
|
||||
// TODO(bunnei): What is the virtual address of NDMA?
|
||||
// case VADDR_NDMA:
|
||||
// NDMA::Read(var, addr);
|
||||
// break;
|
||||
|
||||
case VADDR_LCD:
|
||||
LCD::Read(var, addr);
|
||||
break;
|
||||
|
||||
default:
|
||||
@ -66,8 +59,13 @@ template <typename T>
|
||||
inline void Write(u32 addr, const T data) {
|
||||
switch (addr & 0xFFFFF000) {
|
||||
|
||||
case ADDRESS_NDMA:
|
||||
NDMA::Write(addr, data);
|
||||
// TODO(bunnei): What is the virtual address of NDMA?
|
||||
// case VADDR_NDMA
|
||||
// NDMA::Write(addr, data);
|
||||
// break;
|
||||
|
||||
case VADDR_LCD:
|
||||
LCD::Write(addr, data);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
||||
@ -6,24 +6,126 @@
|
||||
#include "common/log.h"
|
||||
|
||||
#include "core/core.h"
|
||||
#include "core/mem_map.h"
|
||||
#include "core/hw/lcd.h"
|
||||
|
||||
#include "video_core/video_core.h"
|
||||
|
||||
namespace LCD {
|
||||
|
||||
Registers g_regs;
|
||||
|
||||
static const u32 kFrameTicks = 268123480 / 60; ///< 268MHz / 60 frames per second
|
||||
|
||||
u64 g_last_ticks = 0; ///< Last CPU ticks
|
||||
|
||||
/**
|
||||
* Sets whether the framebuffers are in the GSP heap (FCRAM) or VRAM
|
||||
* @param
|
||||
*/
|
||||
void SetFramebufferLocation(const FramebufferLocation mode) {
|
||||
switch (mode) {
|
||||
case FRAMEBUFFER_LOCATION_FCRAM:
|
||||
g_regs.framebuffer_top_left_1 = PADDR_TOP_LEFT_FRAME1;
|
||||
g_regs.framebuffer_top_left_2 = PADDR_TOP_LEFT_FRAME2;
|
||||
g_regs.framebuffer_top_right_1 = PADDR_TOP_RIGHT_FRAME1;
|
||||
g_regs.framebuffer_top_right_2 = PADDR_TOP_RIGHT_FRAME2;
|
||||
g_regs.framebuffer_sub_left_1 = PADDR_SUB_FRAME1;
|
||||
//g_regs.framebuffer_sub_left_2 = unknown;
|
||||
g_regs.framebuffer_sub_right_1 = PADDR_SUB_FRAME2;
|
||||
//g_regs.framebufferr_sub_right_2 = unknown;
|
||||
break;
|
||||
|
||||
case FRAMEBUFFER_LOCATION_VRAM:
|
||||
g_regs.framebuffer_top_left_1 = PADDR_VRAM_TOP_LEFT_FRAME1;
|
||||
g_regs.framebuffer_top_left_2 = PADDR_VRAM_TOP_LEFT_FRAME2;
|
||||
g_regs.framebuffer_top_right_1 = PADDR_VRAM_TOP_RIGHT_FRAME1;
|
||||
g_regs.framebuffer_top_right_2 = PADDR_VRAM_TOP_RIGHT_FRAME2;
|
||||
g_regs.framebuffer_sub_left_1 = PADDR_VRAM_SUB_FRAME1;
|
||||
//g_regs.framebuffer_sub_left_2 = unknown;
|
||||
g_regs.framebuffer_sub_right_1 = PADDR_VRAM_SUB_FRAME2;
|
||||
//g_regs.framebufferr_sub_right_2 = unknown;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Gets the location of the framebuffers
|
||||
* @return Location of framebuffers as FramebufferLocation enum
|
||||
*/
|
||||
const FramebufferLocation GetFramebufferLocation() {
|
||||
if ((g_regs.framebuffer_top_right_1 & ~Memory::VRAM_MASK) == Memory::VRAM_PADDR) {
|
||||
return FRAMEBUFFER_LOCATION_VRAM;
|
||||
} else if ((g_regs.framebuffer_top_right_1 & ~Memory::FCRAM_MASK) == Memory::FCRAM_PADDR) {
|
||||
return FRAMEBUFFER_LOCATION_FCRAM;
|
||||
} else {
|
||||
ERROR_LOG(LCD, "unknown framebuffer location!");
|
||||
}
|
||||
return FRAMEBUFFER_LOCATION_UNKNOWN;
|
||||
}
|
||||
|
||||
/**
|
||||
* Gets a read-only pointer to a framebuffer in memory
|
||||
* @param address Physical address of framebuffer
|
||||
* @return Returns const pointer to raw framebuffer
|
||||
*/
|
||||
const u8* GetFramebufferPointer(const u32 address) {
|
||||
switch (GetFramebufferLocation()) {
|
||||
case FRAMEBUFFER_LOCATION_FCRAM:
|
||||
return (const u8*)Memory::GetPointer(Memory::VirtualAddressFromPhysical_FCRAM(address));
|
||||
case FRAMEBUFFER_LOCATION_VRAM:
|
||||
return (const u8*)Memory::GetPointer(Memory::VirtualAddressFromPhysical_VRAM(address));
|
||||
default:
|
||||
ERROR_LOG(LCD, "unknown framebuffer location");
|
||||
}
|
||||
return NULL;
|
||||
}
|
||||
|
||||
template <typename T>
|
||||
inline void Read(T &var, const u32 addr) {
|
||||
switch (addr) {
|
||||
case REG_FRAMEBUFFER_TOP_LEFT_1:
|
||||
var = g_regs.framebuffer_top_left_1;
|
||||
break;
|
||||
case REG_FRAMEBUFFER_TOP_LEFT_2:
|
||||
var = g_regs.framebuffer_top_left_2;
|
||||
break;
|
||||
case REG_FRAMEBUFFER_TOP_RIGHT_1:
|
||||
var = g_regs.framebuffer_top_right_1;
|
||||
break;
|
||||
case REG_FRAMEBUFFER_TOP_RIGHT_2:
|
||||
var = g_regs.framebuffer_top_right_2;
|
||||
break;
|
||||
case REG_FRAMEBUFFER_SUB_LEFT_1:
|
||||
var = g_regs.framebuffer_sub_left_1;
|
||||
break;
|
||||
case REG_FRAMEBUFFER_SUB_RIGHT_1:
|
||||
var = g_regs.framebuffer_sub_right_1;
|
||||
break;
|
||||
default:
|
||||
ERROR_LOG(LCD, "unknown Read%d @ 0x%08X", sizeof(var) * 8, addr);
|
||||
break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
template <typename T>
|
||||
inline void Write(u32 addr, const T data) {
|
||||
ERROR_LOG(LCD, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8, data, addr);
|
||||
}
|
||||
|
||||
// Explicitly instantiate template functions because we aren't defining this in the header:
|
||||
|
||||
template void Read<u64>(u64 &var, const u32 addr);
|
||||
template void Read<u32>(u32 &var, const u32 addr);
|
||||
template void Read<u16>(u16 &var, const u32 addr);
|
||||
template void Read<u8>(u8 &var, const u32 addr);
|
||||
|
||||
template void Write<u64>(u32 addr, const u64 data);
|
||||
template void Write<u32>(u32 addr, const u32 data);
|
||||
template void Write<u16>(u32 addr, const u16 data);
|
||||
template void Write<u8>(u32 addr, const u8 data);
|
||||
|
||||
/// Update hardware
|
||||
void Update() {
|
||||
u64 current_ticks = Core::g_app_core->GetTicks();
|
||||
@ -37,6 +139,7 @@ void Update() {
|
||||
/// Initialize hardware
|
||||
void Init() {
|
||||
g_last_ticks = Core::g_app_core->GetTicks();
|
||||
SetFramebufferLocation(FRAMEBUFFER_LOCATION_FCRAM);
|
||||
NOTICE_LOG(LCD, "initialized OK");
|
||||
}
|
||||
|
||||
|
||||
@ -8,6 +8,19 @@
|
||||
|
||||
namespace LCD {
|
||||
|
||||
struct Registers {
|
||||
u32 framebuffer_top_left_1;
|
||||
u32 framebuffer_top_left_2;
|
||||
u32 framebuffer_top_right_1;
|
||||
u32 framebuffer_top_right_2;
|
||||
u32 framebuffer_sub_left_1;
|
||||
u32 framebuffer_sub_left_2;
|
||||
u32 framebuffer_sub_right_1;
|
||||
u32 framebuffer_sub_right_2;
|
||||
};
|
||||
|
||||
extern Registers g_regs;
|
||||
|
||||
enum {
|
||||
TOP_ASPECT_X = 0x5,
|
||||
TOP_ASPECT_Y = 0x3,
|
||||
@ -16,15 +29,61 @@ enum {
|
||||
TOP_WIDTH = 400,
|
||||
BOTTOM_WIDTH = 320,
|
||||
|
||||
FRAMEBUFFER_SEL = 0x20184E59,
|
||||
TOP_LEFT_FRAME1 = 0x20184E60,
|
||||
TOP_LEFT_FRAME2 = 0x201CB370,
|
||||
TOP_RIGHT_FRAME1 = 0x20282160,
|
||||
TOP_RIGHT_FRAME2 = 0x202C8670,
|
||||
SUB_FRAME1 = 0x202118E0,
|
||||
SUB_FRAME2 = 0x20249CF0,
|
||||
// Physical addresses in FCRAM used by ARM9 applications - these are correct for real hardware
|
||||
PADDR_FRAMEBUFFER_SEL = 0x20184E59,
|
||||
PADDR_TOP_LEFT_FRAME1 = 0x20184E60,
|
||||
PADDR_TOP_LEFT_FRAME2 = 0x201CB370,
|
||||
PADDR_TOP_RIGHT_FRAME1 = 0x20282160,
|
||||
PADDR_TOP_RIGHT_FRAME2 = 0x202C8670,
|
||||
PADDR_SUB_FRAME1 = 0x202118E0,
|
||||
PADDR_SUB_FRAME2 = 0x20249CF0,
|
||||
|
||||
// Physical addresses in VRAM - I'm not sure how these are actually allocated (so not real)
|
||||
PADDR_VRAM_FRAMEBUFFER_SEL = 0x18184E59,
|
||||
PADDR_VRAM_TOP_LEFT_FRAME1 = 0x18184E60,
|
||||
PADDR_VRAM_TOP_LEFT_FRAME2 = 0x181CB370,
|
||||
PADDR_VRAM_TOP_RIGHT_FRAME1 = 0x18282160,
|
||||
PADDR_VRAM_TOP_RIGHT_FRAME2 = 0x182C8670,
|
||||
PADDR_VRAM_SUB_FRAME1 = 0x182118E0,
|
||||
PADDR_VRAM_SUB_FRAME2 = 0x18249CF0,
|
||||
};
|
||||
|
||||
enum {
|
||||
REG_FRAMEBUFFER_TOP_LEFT_1 = 0x1EF00468, // Main LCD, first framebuffer for 3D left
|
||||
REG_FRAMEBUFFER_TOP_LEFT_2 = 0x1EF0046C, // Main LCD, second framebuffer for 3D left
|
||||
REG_FRAMEBUFFER_TOP_RIGHT_1 = 0x1EF00494, // Main LCD, first framebuffer for 3D right
|
||||
REG_FRAMEBUFFER_TOP_RIGHT_2 = 0x1EF00498, // Main LCD, second framebuffer for 3D right
|
||||
REG_FRAMEBUFFER_SUB_LEFT_1 = 0x1EF00568, // Sub LCD, first framebuffer
|
||||
REG_FRAMEBUFFER_SUB_LEFT_2 = 0x1EF0056C, // Sub LCD, second framebuffer
|
||||
REG_FRAMEBUFFER_SUB_RIGHT_1 = 0x1EF00594, // Sub LCD, unused first framebuffer
|
||||
REG_FRAMEBUFFER_SUB_RIGHT_2 = 0x1EF00598, // Sub LCD, unused second framebuffer
|
||||
};
|
||||
|
||||
/// Framebuffer location
|
||||
enum FramebufferLocation {
|
||||
FRAMEBUFFER_LOCATION_UNKNOWN, ///< Framebuffer location is unknown
|
||||
FRAMEBUFFER_LOCATION_FCRAM, ///< Framebuffer is in the GSP heap
|
||||
FRAMEBUFFER_LOCATION_VRAM, ///< Framebuffer is in VRAM
|
||||
};
|
||||
|
||||
/**
|
||||
* Sets whether the framebuffers are in the GSP heap (FCRAM) or VRAM
|
||||
* @param
|
||||
*/
|
||||
void SetFramebufferLocation(const FramebufferLocation mode);
|
||||
|
||||
/**
|
||||
* Gets a read-only pointer to a framebuffer in memory
|
||||
* @param address Physical address of framebuffer
|
||||
* @return Returns const pointer to raw framebuffer
|
||||
*/
|
||||
const u8* GetFramebufferPointer(const u32 address);
|
||||
|
||||
/**
|
||||
* Gets the location of the framebuffers
|
||||
*/
|
||||
const FramebufferLocation GetFramebufferLocation();
|
||||
|
||||
template <typename T>
|
||||
inline void Read(T &var, const u32 addr);
|
||||
|
||||
|
||||
@ -16,23 +16,25 @@ u8* g_base = NULL; ///< The base pointer to the aut
|
||||
|
||||
MemArena g_arena; ///< The MemArena class
|
||||
|
||||
u8* g_heap_gsp = NULL; ///< GSP heap (main memory)
|
||||
u8* g_heap = NULL; ///< Application heap (main memory)
|
||||
u8* g_heap_gsp = NULL; ///< GSP heap (main memory)
|
||||
u8* g_vram = NULL; ///< Video memory (VRAM) pointer
|
||||
u8* g_shared_mem = NULL; ///< Shared memory
|
||||
|
||||
u8* g_physical_bootrom = NULL; ///< Bootrom physical memory
|
||||
u8* g_uncached_bootrom = NULL;
|
||||
|
||||
u8* g_physical_fcram = NULL; ///< Main physical memory (FCRAM)
|
||||
u8* g_physical_heap_gsp = NULL;
|
||||
u8* g_physical_heap_gsp = NULL; ///< GSP heap physical memory
|
||||
u8* g_physical_vram = NULL; ///< Video physical memory (VRAM)
|
||||
u8* g_physical_scratchpad = NULL; ///< Scratchpad memory used for main thread stack
|
||||
u8* g_physical_shared_mem = NULL; ///< Physical shared memory
|
||||
|
||||
// We don't declare the IO region in here since its handled by other means.
|
||||
static MemoryView g_views[] = {
|
||||
{&g_vram, &g_physical_vram, VRAM_VADDR, VRAM_SIZE, 0},
|
||||
{&g_heap_gsp, &g_physical_heap_gsp, HEAP_GSP_VADDR, HEAP_GSP_SIZE, 0},
|
||||
{&g_heap, &g_physical_fcram, HEAP_VADDR, HEAP_SIZE, MV_IS_PRIMARY_RAM},
|
||||
{&g_vram, &g_physical_vram, VRAM_VADDR, VRAM_SIZE, 0},
|
||||
{&g_heap, &g_physical_fcram, HEAP_VADDR, HEAP_SIZE, MV_IS_PRIMARY_RAM},
|
||||
{&g_shared_mem, &g_physical_shared_mem, SHARED_MEMORY_VADDR, SHARED_MEMORY_SIZE, 0},
|
||||
{&g_heap_gsp, &g_physical_heap_gsp, HEAP_GSP_VADDR, HEAP_GSP_SIZE, 0},
|
||||
};
|
||||
|
||||
/*static MemoryView views[] =
|
||||
|
||||
@ -21,6 +21,11 @@ enum {
|
||||
SCRATCHPAD_SIZE = 0x00004000, ///< Typical stack size - TODO: Read from exheader
|
||||
HEAP_GSP_SIZE = 0x02000000, ///< GSP heap size... TODO: Define correctly?
|
||||
HEAP_SIZE = FCRAM_SIZE, ///< Application heap size
|
||||
SHARED_MEMORY_SIZE = 0x04000000, ///< Shared memory size
|
||||
HARDWARE_IO_SIZE = 0x01000000,
|
||||
|
||||
SHARED_MEMORY_VADDR = 0x10000000, ///< Shared memory
|
||||
SHARED_MEMORY_VADDR_END = (SHARED_MEMORY_VADDR + SHARED_MEMORY_SIZE),
|
||||
|
||||
HEAP_PADDR = HEAP_GSP_SIZE,
|
||||
HEAP_PADDR_END = (HEAP_PADDR + HEAP_SIZE),
|
||||
@ -36,23 +41,34 @@ enum {
|
||||
SCRATCHPAD_MASK = (SCRATCHPAD_SIZE - 1), ///< Scratchpad memory mask
|
||||
HEAP_GSP_MASK = (HEAP_GSP_SIZE - 1),
|
||||
HEAP_MASK = (HEAP_SIZE - 1),
|
||||
SHARED_MEMORY_MASK = (SHARED_MEMORY_SIZE - 1),
|
||||
|
||||
FCRAM_PADDR = 0x20000000, ///< FCRAM physical address
|
||||
FCRAM_PADDR_END = (FCRAM_PADDR + FCRAM_SIZE), ///< FCRAM end of physical space
|
||||
FCRAM_VADDR = 0x08000000, ///< FCRAM virtual address
|
||||
FCRAM_VADDR_END = (FCRAM_VADDR + FCRAM_SIZE), ///< FCRAM end of virtual space
|
||||
|
||||
HARDWARE_IO_PADDR = 0x10000000, ///< IO physical address start
|
||||
HARDWARE_IO_VADDR = 0x1EC00000, ///< IO virtual address start
|
||||
HARDWARE_IO_PADDR_END = (HARDWARE_IO_PADDR + HARDWARE_IO_SIZE),
|
||||
HARDWARE_IO_VADDR_END = (HARDWARE_IO_VADDR + HARDWARE_IO_SIZE),
|
||||
|
||||
VRAM_PADDR = 0x18000000,
|
||||
VRAM_VADDR = 0x1F000000,
|
||||
VRAM_PADDR_END = (VRAM_PADDR + VRAM_SIZE),
|
||||
VRAM_VADDR_END = (VRAM_VADDR + VRAM_SIZE),
|
||||
|
||||
SCRATCHPAD_VADDR_END = 0x10000000,
|
||||
SCRATCHPAD_VADDR = (SCRATCHPAD_VADDR_END - SCRATCHPAD_SIZE), ///< Stack space
|
||||
};
|
||||
|
||||
////////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
/// Represents a block of heap memory mapped by ControlMemory
|
||||
struct HeapBlock {
|
||||
HeapBlock() : base_address(0), address(0), size(0), operation(0), permissions(0) {
|
||||
/// Represents a block of memory mapped by ControlMemory/MapMemoryBlock
|
||||
struct MemoryBlock {
|
||||
MemoryBlock() : handle(0), base_address(0), address(0), size(0), operation(0), permissions(0) {
|
||||
}
|
||||
u32 handle;
|
||||
u32 base_address;
|
||||
u32 address;
|
||||
u32 size;
|
||||
@ -81,6 +97,7 @@ extern u8 *g_base;
|
||||
extern u8* g_heap_gsp; ///< GSP heap (main memory)
|
||||
extern u8* g_heap; ///< Application heap (main memory)
|
||||
extern u8* g_vram; ///< Video memory (VRAM)
|
||||
extern u8* g_shared_mem; ///< Shared memory
|
||||
|
||||
void Init();
|
||||
void Shutdown();
|
||||
@ -98,10 +115,26 @@ void Write32(const u32 addr, const u32 data);
|
||||
|
||||
u8* GetPointer(const u32 Address);
|
||||
|
||||
/**
|
||||
* Maps a block of memory in shared memory
|
||||
* @param handle Handle to map memory block for
|
||||
* @param addr Address to map memory block to
|
||||
* @param permissions Memory map permissions
|
||||
*/
|
||||
u32 MapBlock_Shared(u32 handle, u32 addr,u32 permissions) ;
|
||||
|
||||
/**
|
||||
* Maps a block of memory on the heap
|
||||
* @param size Size of block in bytes
|
||||
* @param operation Memory map operation type
|
||||
* @param flags Memory allocation flags
|
||||
*/
|
||||
u32 MapBlock_Heap(u32 size, u32 operation, u32 permissions);
|
||||
|
||||
/**
|
||||
* Maps a block of memory on the GSP heap
|
||||
* @param size Size of block in bytes
|
||||
* @param operation Control memory operation
|
||||
* @param operation Memory map operation type
|
||||
* @param permissions Control memory permissions
|
||||
*/
|
||||
u32 MapBlock_HeapGSP(u32 size, u32 operation, u32 permissions);
|
||||
@ -110,4 +143,16 @@ inline const char* GetCharPointer(const u32 address) {
|
||||
return (const char *)GetPointer(address);
|
||||
}
|
||||
|
||||
inline const u32 VirtualAddressFromPhysical_FCRAM(const u32 address) {
|
||||
return ((address & FCRAM_MASK) | FCRAM_VADDR);
|
||||
}
|
||||
|
||||
inline const u32 VirtualAddressFromPhysical_IO(const u32 address) {
|
||||
return (address + 0x0EB00000);
|
||||
}
|
||||
|
||||
inline const u32 VirtualAddressFromPhysical_VRAM(const u32 address) {
|
||||
return (address + 0x07000000);
|
||||
}
|
||||
|
||||
} // namespace
|
||||
|
||||
@ -12,15 +12,25 @@
|
||||
|
||||
namespace Memory {
|
||||
|
||||
std::map<u32, HeapBlock> g_heap_gsp_map;
|
||||
std::map<u32, MemoryBlock> g_heap_map;
|
||||
std::map<u32, MemoryBlock> g_heap_gsp_map;
|
||||
std::map<u32, MemoryBlock> g_shared_map;
|
||||
|
||||
/// Convert a physical address to virtual address
|
||||
u32 _AddressPhysicalToVirtual(const u32 addr) {
|
||||
// Our memory interface read/write functions assume virtual addresses. Put any physical address
|
||||
// to virtual address translations here. This is obviously quite hacky... But we're not doing
|
||||
// any MMU emulation yet or anything
|
||||
if ((addr >= FCRAM_PADDR) && (addr < (FCRAM_PADDR_END))) {
|
||||
return (addr & FCRAM_MASK) | FCRAM_VADDR;
|
||||
if ((addr >= FCRAM_PADDR) && (addr < FCRAM_PADDR_END)) {
|
||||
return VirtualAddressFromPhysical_FCRAM(addr);
|
||||
|
||||
// Hardware IO
|
||||
// TODO(bunnei): FixMe
|
||||
// This isn't going to work... The physical address of HARDWARE_IO conflicts with the virtual
|
||||
// address of shared memory.
|
||||
//} else if ((addr >= HARDWARE_IO_PADDR) && (addr < HARDWARE_IO_PADDR_END)) {
|
||||
// return (addr + 0x0EB00000);
|
||||
|
||||
}
|
||||
return addr;
|
||||
}
|
||||
@ -41,19 +51,24 @@ inline void _Read(T &var, const u32 addr) {
|
||||
|
||||
// Hardware I/O register reads
|
||||
// 0x10XXXXXX- is physical address space, 0x1EXXXXXX is virtual address space
|
||||
} else if ((vaddr & 0xFF000000) == 0x10000000 || (vaddr & 0xFF000000) == 0x1E000000) {
|
||||
} else if ((vaddr >= HARDWARE_IO_VADDR) && (vaddr < HARDWARE_IO_VADDR_END)) {
|
||||
HW::Read<T>(var, vaddr);
|
||||
|
||||
// FCRAM - GSP heap
|
||||
} else if ((vaddr > HEAP_GSP_VADDR) && (vaddr < HEAP_GSP_VADDR_END)) {
|
||||
} else if ((vaddr >= HEAP_GSP_VADDR) && (vaddr < HEAP_GSP_VADDR_END)) {
|
||||
var = *((const T*)&g_heap_gsp[vaddr & HEAP_GSP_MASK]);
|
||||
|
||||
// FCRAM - application heap
|
||||
} else if ((vaddr > HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
|
||||
} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
|
||||
var = *((const T*)&g_heap[vaddr & HEAP_MASK]);
|
||||
|
||||
/*else if ((vaddr & 0x3F800000) == 0x04000000) {
|
||||
var = *((const T*)&m_pVRAM[vaddr & VRAM_MASK]);*/
|
||||
// Shared memory
|
||||
} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
|
||||
var = *((const T*)&g_shared_mem[vaddr & SHARED_MEMORY_MASK]);
|
||||
|
||||
// VRAM
|
||||
} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
|
||||
var = *((const T*)&g_vram[vaddr & VRAM_MASK]);
|
||||
|
||||
} else {
|
||||
//_assert_msg_(MEMMAP, false, "unknown Read%d @ 0x%08X", sizeof(var) * 8, vaddr);
|
||||
@ -72,23 +87,25 @@ inline void _Write(u32 addr, const T data) {
|
||||
|
||||
// Hardware I/O register writes
|
||||
// 0x10XXXXXX- is physical address space, 0x1EXXXXXX is virtual address space
|
||||
} else if ((vaddr & 0xFF000000) == 0x10000000 || (vaddr & 0xFF000000) == 0x1E000000) {
|
||||
} else if ((vaddr >= HARDWARE_IO_VADDR) && (vaddr < HARDWARE_IO_VADDR_END)) {
|
||||
HW::Write<T>(vaddr, data);
|
||||
|
||||
// FCRAM - GSP heap
|
||||
} else if ((vaddr > HEAP_GSP_VADDR) && (vaddr < HEAP_GSP_VADDR_END)) {
|
||||
} else if ((vaddr >= HEAP_GSP_VADDR) && (vaddr < HEAP_GSP_VADDR_END)) {
|
||||
*(T*)&g_heap_gsp[vaddr & HEAP_GSP_MASK] = data;
|
||||
|
||||
// FCRAM - application heap
|
||||
} else if ((vaddr > HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
|
||||
} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
|
||||
*(T*)&g_heap[vaddr & HEAP_MASK] = data;
|
||||
|
||||
} else if ((vaddr & 0xFF000000) == 0x14000000) {
|
||||
_assert_msg_(MEMMAP, false, "umimplemented write to GSP heap");
|
||||
} else if ((vaddr & 0xFFF00000) == 0x1EC00000) {
|
||||
_assert_msg_(MEMMAP, false, "umimplemented write to IO registers");
|
||||
} else if ((vaddr & 0xFF000000) == 0x1F000000) {
|
||||
_assert_msg_(MEMMAP, false, "umimplemented write to VRAM");
|
||||
// Shared memory
|
||||
} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
|
||||
*(T*)&g_shared_mem[vaddr & SHARED_MEMORY_MASK] = data;
|
||||
|
||||
// VRAM
|
||||
} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
|
||||
*(T*)&g_vram[vaddr & VRAM_MASK] = data;
|
||||
|
||||
} else if ((vaddr & 0xFFF00000) == 0x1FF00000) {
|
||||
_assert_msg_(MEMMAP, false, "umimplemented write to DSP memory");
|
||||
} else if ((vaddr & 0xFFFF0000) == 0x1FF80000) {
|
||||
@ -114,19 +131,73 @@ u8 *GetPointer(const u32 addr) {
|
||||
} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
|
||||
return g_heap + (vaddr & HEAP_MASK);
|
||||
|
||||
// Shared memory
|
||||
} else if ((vaddr > SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
|
||||
return g_shared_mem + (vaddr & SHARED_MEMORY_MASK);
|
||||
|
||||
// VRAM
|
||||
} else if ((vaddr > VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
|
||||
return g_vram + (vaddr & VRAM_MASK);
|
||||
|
||||
} else {
|
||||
ERROR_LOG(MEMMAP, "Unknown GetPointer @ 0x%08x", vaddr);
|
||||
ERROR_LOG(MEMMAP, "unknown GetPointer @ 0x%08x", vaddr);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* Maps a block of memory in shared memory
|
||||
* @param handle Handle to map memory block for
|
||||
* @param addr Address to map memory block to
|
||||
* @param permissions Memory map permissions
|
||||
*/
|
||||
u32 MapBlock_Shared(u32 handle, u32 addr,u32 permissions) {
|
||||
MemoryBlock block;
|
||||
|
||||
block.handle = handle;
|
||||
block.base_address = addr;
|
||||
block.permissions = permissions;
|
||||
|
||||
if (g_shared_map.size() > 0) {
|
||||
const MemoryBlock last_block = g_shared_map.rbegin()->second;
|
||||
block.address = last_block.address + last_block.size;
|
||||
}
|
||||
g_shared_map[block.GetVirtualAddress()] = block;
|
||||
|
||||
return block.GetVirtualAddress();
|
||||
}
|
||||
|
||||
/**
|
||||
* Maps a block of memory on the heap
|
||||
* @param size Size of block in bytes
|
||||
* @param operation Memory map operation type
|
||||
* @param flags Memory allocation flags
|
||||
*/
|
||||
u32 MapBlock_Heap(u32 size, u32 operation, u32 permissions) {
|
||||
MemoryBlock block;
|
||||
|
||||
block.base_address = HEAP_VADDR;
|
||||
block.size = size;
|
||||
block.operation = operation;
|
||||
block.permissions = permissions;
|
||||
|
||||
if (g_heap_map.size() > 0) {
|
||||
const MemoryBlock last_block = g_heap_map.rbegin()->second;
|
||||
block.address = last_block.address + last_block.size;
|
||||
}
|
||||
g_heap_map[block.GetVirtualAddress()] = block;
|
||||
|
||||
return block.GetVirtualAddress();
|
||||
}
|
||||
|
||||
/**
|
||||
* Maps a block of memory on the GSP heap
|
||||
* @param size Size of block in bytes
|
||||
* @param operation Memory map operation type
|
||||
* @param flags Memory allocation flags
|
||||
*/
|
||||
u32 MapBlock_HeapGSP(u32 size, u32 operation, u32 permissions) {
|
||||
HeapBlock block;
|
||||
MemoryBlock block;
|
||||
|
||||
block.base_address = HEAP_GSP_VADDR;
|
||||
block.size = size;
|
||||
@ -134,7 +205,7 @@ u32 MapBlock_HeapGSP(u32 size, u32 operation, u32 permissions) {
|
||||
block.permissions = permissions;
|
||||
|
||||
if (g_heap_gsp_map.size() > 0) {
|
||||
const HeapBlock last_block = g_heap_gsp_map.rbegin()->second;
|
||||
const MemoryBlock last_block = g_heap_gsp_map.rbegin()->second;
|
||||
block.address = last_block.address + last_block.size;
|
||||
}
|
||||
g_heap_gsp_map[block.GetVirtualAddress()] = block;
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
|
||||
#include "common/common.h"
|
||||
|
||||
class RendererBase {
|
||||
class RendererBase : NonCopyable {
|
||||
public:
|
||||
|
||||
/// Used to reference a framebuffer
|
||||
@ -52,6 +52,4 @@ protected:
|
||||
f32 m_current_fps; ///< Current framerate, should be set by the renderer
|
||||
int m_current_frame; ///< Current frame, should be set by the renderer
|
||||
|
||||
private:
|
||||
DISALLOW_COPY_AND_ASSIGN(RendererBase);
|
||||
};
|
||||
|
||||
@ -53,12 +53,11 @@ void RendererOpenGL::SwapBuffers() {
|
||||
|
||||
/**
|
||||
* Helper function to flip framebuffer from left-to-right to top-to-bottom
|
||||
* @param addr Address of framebuffer in RAM
|
||||
* @param in Pointer to input raw framebuffer in V/RAM
|
||||
* @param out Pointer to output buffer with flipped framebuffer
|
||||
* @todo Early on hack... I'd like to find a more efficient way of doing this /bunnei
|
||||
*/
|
||||
void RendererOpenGL::FlipFramebuffer(u32 addr, u8* out) {
|
||||
u8* in = Memory::GetPointer(addr);
|
||||
void RendererOpenGL::FlipFramebuffer(const u8* in, u8* out) {
|
||||
for (int y = 0; y < VideoCore::kScreenTopHeight; y++) {
|
||||
for (int x = 0; x < VideoCore::kScreenTopWidth; x++) {
|
||||
int in_coord = (VideoCore::kScreenTopHeight * 3 * x) + (VideoCore::kScreenTopHeight * 3)
|
||||
@ -77,10 +76,10 @@ void RendererOpenGL::FlipFramebuffer(u32 addr, u8* out) {
|
||||
* @param src_rect Source rectangle in XFB to copy
|
||||
* @param dst_rect Destination rectangle in output framebuffer to copy to
|
||||
*/
|
||||
void RendererOpenGL::RenderXFB(const Rect& src_rect, const Rect& dst_rect) {
|
||||
void RendererOpenGL::RenderXFB(const Rect& src_rect, const Rect& dst_rect) {
|
||||
|
||||
FlipFramebuffer(LCD::TOP_RIGHT_FRAME1, m_xfb_top_flipped);
|
||||
FlipFramebuffer(LCD::SUB_FRAME1, m_xfb_bottom_flipped);
|
||||
FlipFramebuffer(LCD::GetFramebufferPointer(LCD::g_regs.framebuffer_top_left_1), m_xfb_top_flipped);
|
||||
FlipFramebuffer(LCD::GetFramebufferPointer(LCD::g_regs.framebuffer_sub_left_1), m_xfb_bottom_flipped);
|
||||
|
||||
// Blit the top framebuffer
|
||||
// ------------------------
|
||||
|
||||
@ -55,11 +55,11 @@ private:
|
||||
|
||||
/**
|
||||
* Helper function to flip framebuffer from left-to-right to top-to-bottom
|
||||
* @param addr Address of framebuffer in RAM
|
||||
* @param in Pointer to input raw framebuffer in V/RAM
|
||||
* @param out Pointer to output buffer with flipped framebuffer
|
||||
* @todo Early on hack... I'd like to find a more efficient way of doing this /bunnei
|
||||
*/
|
||||
void RendererOpenGL::FlipFramebuffer(u32 addr, u8* out);
|
||||
void RendererOpenGL::FlipFramebuffer(const u8* in, u8* out);
|
||||
|
||||
|
||||
EmuWindow* m_render_window; ///< Handle to render window
|
||||
@ -87,5 +87,4 @@ private:
|
||||
u8 m_xfb_top_flipped[VideoCore::kScreenTopWidth * VideoCore::kScreenTopWidth * 4];
|
||||
u8 m_xfb_bottom_flipped[VideoCore::kScreenTopWidth * VideoCore::kScreenTopWidth * 4];
|
||||
|
||||
DISALLOW_COPY_AND_ASSIGN(RendererOpenGL);
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user