Move ConstBufferAccessor to Maxwell3d, correct mistakes and clang format.
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797e351bf8
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492040bd9c
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@ -1,5 +1,4 @@
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add_library(video_core STATIC
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const_buffer_accessor.h
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dma_pusher.cpp
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dma_pusher.h
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debug_utils/debug_utils.cpp
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@ -1,28 +0,0 @@
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#pragma once
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#include <cstring>
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#include "common/common_types.h"
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#include "core/core.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/gpu.h"
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#include "video_core/memory_manager.h"
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namespace Tegra {
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namespace ConstBufferAccessor {
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template <typename T>
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T access(Tegra::Engines::Maxwell3D::Regs::ShaderStage stage, u64 const_buffer, u64 offset) {
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auto& gpu = Core::System::GetInstance().GPU();
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auto& memory_manager = gpu.MemoryManager();
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auto& maxwell3d = gpu.Maxwell3D();
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const auto& shader_stage = maxwell3d.state.shader_stages[static_cast<std::size_t>(stage)];
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const auto& buffer = shader_stage.const_buffers[const_buffer];
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T result;
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std::memcpy(&result, memory_manager.GetPointer(buffer.address + offset), sizeof(T));
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return result;
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}
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} // namespace ConstBufferAccessor
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} // namespace Tegra
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@ -502,8 +502,8 @@ Texture::FullTextureInfo Maxwell3D::GetTextureInfo(const Texture::TextureHandle
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Texture::FullTextureInfo Maxwell3D::GetStageTexture(Regs::ShaderStage stage,
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std::size_t offset) const {
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auto& shader = state.shader_stages[static_cast<std::size_t>(stage)];
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auto& tex_info_buffer = shader.const_buffers[regs.tex_cb_index];
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const auto& shader = state.shader_stages[static_cast<std::size_t>(stage)];
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const auto& tex_info_buffer = shader.const_buffers[regs.tex_cb_index];
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ASSERT(tex_info_buffer.enabled && tex_info_buffer.address != 0);
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const GPUVAddr tex_info_address =
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@ -529,4 +529,12 @@ void Maxwell3D::ProcessClearBuffers() {
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rasterizer.Clear();
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}
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u32 Maxwell3D::AccessConstBuffer32(Regs::ShaderStage stage, u64 const_buffer, u64 offset) const {
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const auto& shader_stage = state.shader_stages[static_cast<std::size_t>(stage)];
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const auto& buffer = shader_stage.const_buffers[const_buffer];
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u32 result;
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std::memcpy(&result, memory_manager.GetPointer(buffer.address + offset), sizeof(u32));
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return result;
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}
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} // namespace Tegra::Engines
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@ -1141,6 +1141,8 @@ public:
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/// Returns the texture information for a specific texture in a specific shader stage.
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Texture::FullTextureInfo GetStageTexture(Regs::ShaderStage stage, std::size_t offset) const;
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u32 AccessConstBuffer32(Regs::ShaderStage stage, u64 const_buffer, u64 offset) const;
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/// Memory for macro code - it's undetermined how big this is, however 1MB is much larger than
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/// we've seen used.
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using MacroMemory = std::array<u32, 0x40000>;
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@ -976,7 +976,7 @@ union Instruction {
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BitField<37, 3, TextureProcessMode> process_mode;
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bool IsComponentEnabled(std::size_t component) const {
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return ((1ull << component) & component_mask) != 0;
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return ((1ULL << component) & component_mask) != 0;
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}
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TextureProcessMode GetTextureProcessMode() const {
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@ -19,7 +19,6 @@
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#include "core/core.h"
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#include "core/hle/kernel/process.h"
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#include "core/settings.h"
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#include "video_core/const_buffer_accessor.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/renderer_opengl/gl_rasterizer.h"
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#include "video_core/renderer_opengl/gl_shader_cache.h"
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@ -985,14 +984,13 @@ void RasterizerOpenGL::SetupTextures(Maxwell::ShaderStage stage, const Shader& s
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for (u32 bindpoint = 0; bindpoint < entries.size(); ++bindpoint) {
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const auto& entry = entries[bindpoint];
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Tegra::Texture::FullTextureInfo texture;
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if (!entry.IsBindless()) {
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texture = maxwell3d.GetStageTexture(stage, entry.GetOffset());
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} else {
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if (entry.IsBindless()) {
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const auto cbuf = entry.GetBindlessCBuf();
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Tegra::Texture::TextureHandle tex_handle;
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tex_handle.raw =
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Tegra::ConstBufferAccessor::access<u32>(stage, cbuf.first, cbuf.second);
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tex_handle.raw = maxwell3d.AccessConstBuffer32(stage, cbuf.first, cbuf.second);
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texture = maxwell3d.GetTextureInfo(tex_handle, entry.GetOffset());
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} else {
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texture = maxwell3d.GetStageTexture(stage, entry.GetOffset());
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}
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const u32 current_bindpoint = base_bindings.sampler + bindpoint;
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@ -328,9 +328,10 @@ std::optional<ShaderDiskCacheDecompiled> ShaderDiskCacheOpenGL::LoadDecompiledEn
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file.ReadBytes(&is_bindless, sizeof(u8)) != sizeof(u8)) {
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return {};
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}
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entry.entries.samplers.emplace_back(
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static_cast<std::size_t>(offset), static_cast<std::size_t>(index),
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static_cast<Tegra::Shader::TextureType>(type), is_array != 0, is_shadow != 0, is_bindless != 0);
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entry.entries.samplers.emplace_back(static_cast<std::size_t>(offset),
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static_cast<std::size_t>(index),
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static_cast<Tegra::Shader::TextureType>(type),
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is_array != 0, is_shadow != 0, is_bindless != 0);
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}
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u32 global_memory_count{};
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@ -153,6 +153,7 @@ u32 ShaderIR::DecodeTexture(NodeBlock& bb, u32 pc) {
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}
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case OpCode::Id::TXQ_B:
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is_bindless = true;
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[[fallthrough]];
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case OpCode::Id::TXQ: {
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if (instr.txq.UsesMiscMode(TextureMiscMode::NODEP)) {
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LOG_WARNING(HW_GPU, "TXQ.NODEP implementation is incomplete");
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@ -193,6 +194,7 @@ u32 ShaderIR::DecodeTexture(NodeBlock& bb, u32 pc) {
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}
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case OpCode::Id::TMML_B:
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is_bindless = true;
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[[fallthrough]];
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case OpCode::Id::TMML: {
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UNIMPLEMENTED_IF_MSG(instr.tmml.UsesMiscMode(Tegra::Shader::TextureMiscMode::NDV),
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"NDV is not implemented");
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@ -285,7 +287,6 @@ const Sampler& ShaderIR::GetSampler(const Tegra::Shader::Sampler& sampler, Textu
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const Sampler& ShaderIR::GetBindlessSampler(const Tegra::Shader::Register& reg, TextureType type,
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bool is_array, bool is_shadow) {
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const Node sampler_register = GetRegister(reg);
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const Node base_sampler =
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TrackCbuf(sampler_register, global_code, static_cast<s64>(global_code.size()));
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@ -196,7 +196,7 @@ enum class ExitMethod {
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class Sampler {
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public:
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// Use this constructor for binded Samplers
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// Use this constructor for bounded Samplers
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explicit Sampler(std::size_t offset, std::size_t index, Tegra::Shader::TextureType type,
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bool is_array, bool is_shadow)
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: offset{offset}, index{index}, type{type}, is_array{is_array}, is_shadow{is_shadow},
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@ -239,7 +239,7 @@ public:
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}
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std::pair<u32, u32> GetBindlessCBuf() const {
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return {offset >> 32, offset & 0x00000000FFFFFFFFULL};
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return {static_cast<u32>(offset >> 32), static_cast<u32>(offset)};
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}
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bool operator<(const Sampler& rhs) const {
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