Fixed FSETP and FSET
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f034121620
commit
5c5b4e8e7d
@ -753,7 +753,6 @@ union Instruction {
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BitField<45, 2, PredOperation> op;
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BitField<45, 2, PredOperation> op;
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BitField<47, 1, u64> ftz;
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BitField<47, 1, u64> ftz;
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BitField<48, 4, PredCondition> cond;
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BitField<48, 4, PredCondition> cond;
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BitField<56, 1, u64> neg_b;
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} fsetp;
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} fsetp;
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union {
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union {
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@ -828,7 +827,6 @@ union Instruction {
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BitField<53, 1, u64> neg_b;
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BitField<53, 1, u64> neg_b;
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BitField<54, 1, u64> abs_a;
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BitField<54, 1, u64> abs_a;
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BitField<55, 1, u64> ftz;
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BitField<55, 1, u64> ftz;
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BitField<56, 1, u64> neg_imm;
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} fset;
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} fset;
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union {
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union {
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@ -2736,20 +2736,13 @@ private:
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break;
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break;
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}
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}
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case OpCode::Type::FloatSetPredicate: {
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case OpCode::Type::FloatSetPredicate: {
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std::string op_a = instr.fsetp.neg_a ? "-" : "";
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const std::string op_a =
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op_a += regs.GetRegisterAsFloat(instr.gpr8);
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GetOperandAbsNeg(regs.GetRegisterAsFloat(instr.gpr8), instr.fsetp.abs_a != 0,
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instr.fsetp.neg_a != 0);
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if (instr.fsetp.abs_a) {
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std::string op_b;
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op_a = "abs(" + op_a + ')';
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}
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std::string op_b{};
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if (instr.is_b_imm) {
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if (instr.is_b_imm) {
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if (instr.fsetp.neg_b) {
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// Only the immediate version of fsetp has a neg_b bit.
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op_b += '-';
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}
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op_b += '(' + GetImmediate19(instr) + ')';
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op_b += '(' + GetImmediate19(instr) + ')';
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} else {
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} else {
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if (instr.is_b_gpr) {
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if (instr.is_b_gpr) {
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@ -2945,33 +2938,24 @@ private:
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break;
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break;
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}
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}
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case OpCode::Type::FloatSet: {
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case OpCode::Type::FloatSet: {
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std::string op_a = instr.fset.neg_a ? "-" : "";
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const std::string op_a = GetOperandAbsNeg(regs.GetRegisterAsFloat(instr.gpr8),
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op_a += regs.GetRegisterAsFloat(instr.gpr8);
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instr.fset.abs_a != 0, instr.fset.neg_a != 0);
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if (instr.fset.abs_a) {
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std::string op_b;
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op_a = "abs(" + op_a + ')';
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}
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std::string op_b = instr.fset.neg_b ? "-" : "";
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if (instr.is_b_imm) {
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if (instr.is_b_imm) {
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const std::string imm = GetImmediate19(instr);
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const std::string imm = GetImmediate19(instr);
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if (instr.fset.neg_imm)
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op_b = imm;
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op_b += "(-" + imm + ')';
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else
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op_b += imm;
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} else {
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} else {
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if (instr.is_b_gpr) {
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if (instr.is_b_gpr) {
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op_b += regs.GetRegisterAsFloat(instr.gpr20);
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op_b = regs.GetRegisterAsFloat(instr.gpr20);
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} else {
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} else {
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op_b += regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
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op_b = regs.GetUniform(instr.cbuf34.index, instr.cbuf34.offset,
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GLSLRegister::Type::Float);
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GLSLRegister::Type::Float);
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}
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}
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}
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}
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if (instr.fset.abs_b) {
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op_b = GetOperandAbsNeg(op_b, instr.fset.abs_b != 0, instr.fset.neg_b != 0);
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op_b = "abs(" + op_b + ')';
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}
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// The fset instruction sets a register to 1.0 or -1 (depending on the bf bit) if the
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// The fset instruction sets a register to 1.0 or -1 (depending on the bf bit) if the
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// condition is true, and to 0 otherwise.
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// condition is true, and to 0 otherwise.
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