Merge pull request #2082 from FernandoS27/txq-stl
Fix TXQ not using the component mask.
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commit
bb4549a73d
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@ -981,6 +981,10 @@ union Instruction {
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}
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}
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return false;
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return false;
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}
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}
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bool IsComponentEnabled(std::size_t component) const {
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return ((1ULL << component) & component_mask) != 0;
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}
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} txq;
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} txq;
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union {
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union {
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@ -324,15 +324,18 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, const BasicBlock& code, u32 pc) {
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const auto& sampler =
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const auto& sampler =
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GetSampler(instr.sampler, Tegra::Shader::TextureType::Texture2D, false, false);
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GetSampler(instr.sampler, Tegra::Shader::TextureType::Texture2D, false, false);
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u32 indexer = 0;
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switch (instr.txq.query_type) {
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switch (instr.txq.query_type) {
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case Tegra::Shader::TextureQueryType::Dimension: {
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case Tegra::Shader::TextureQueryType::Dimension: {
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for (u32 element = 0; element < 4; ++element) {
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for (u32 element = 0; element < 4; ++element) {
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if (instr.txq.IsComponentEnabled(element)) {
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MetaTexture meta{sampler, element};
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MetaTexture meta{sampler, element};
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const Node value = Operation(OperationCode::F4TextureQueryDimensions,
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const Node value = Operation(OperationCode::F4TextureQueryDimensions,
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std::move(meta), GetRegister(instr.gpr8));
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std::move(meta), GetRegister(instr.gpr8));
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SetTemporal(bb, element, value);
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SetTemporal(bb, indexer++, value);
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}
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}
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for (u32 i = 0; i < 4; ++i) {
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}
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for (u32 i = 0; i < indexer; ++i) {
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SetRegister(bb, instr.gpr0.Value() + i, GetTemporal(i));
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SetRegister(bb, instr.gpr0.Value() + i, GetTemporal(i));
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}
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}
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break;
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break;
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