Revert Buffer cache changes and setup additional macros.
This commit is contained in:
parent
18637766ef
commit
ce448ce770
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@ -170,11 +170,6 @@ public:
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void BindComputeTextureBuffer(size_t tbo_index, GPUVAddr gpu_addr, u32 size, PixelFormat format,
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bool is_written, bool is_image);
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[[nodiscard]] std::pair<Buffer*, u32> ObtainBuffer(GPUVAddr gpu_addr, u32 size,
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bool synchronize = true,
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bool mark_as_written = false,
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bool discard_downloads = false);
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void FlushCachedWrites();
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/// Return true when there are uncommitted buffers to be downloaded
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@ -354,8 +349,6 @@ private:
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bool SynchronizeBufferImpl(Buffer& buffer, VAddr cpu_addr, u32 size);
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bool SynchronizeBufferNoModified(Buffer& buffer, VAddr cpu_addr, u32 size);
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void UploadMemory(Buffer& buffer, u64 total_size_bytes, u64 largest_copy,
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std::span<BufferCopy> copies);
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@ -442,7 +435,6 @@ private:
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std::vector<BufferId> cached_write_buffer_ids;
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IntervalSet discarded_ranges;
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IntervalSet uncommitted_ranges;
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IntervalSet common_ranges;
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std::deque<IntervalSet> committed_ranges;
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@ -600,17 +592,13 @@ bool BufferCache<P>::DMACopy(GPUVAddr src_address, GPUVAddr dest_address, u64 am
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}};
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boost::container::small_vector<IntervalType, 4> tmp_intervals;
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const bool is_high_accuracy =
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Settings::values.gpu_accuracy.GetValue() == Settings::GPUAccuracy::High;
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auto mirror = [&](VAddr base_address, VAddr base_address_end) {
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const u64 size = base_address_end - base_address;
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const VAddr diff = base_address - *cpu_src_address;
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const VAddr new_base_address = *cpu_dest_address + diff;
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const IntervalType add_interval{new_base_address, new_base_address + size};
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uncommitted_ranges.add(add_interval);
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tmp_intervals.push_back(add_interval);
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if (is_high_accuracy) {
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uncommitted_ranges.add(add_interval);
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}
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};
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ForEachWrittenRange(*cpu_src_address, amount, mirror);
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// This subtraction in this order is important for overlapping copies.
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@ -821,32 +809,6 @@ void BufferCache<P>::BindComputeTextureBuffer(size_t tbo_index, GPUVAddr gpu_add
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compute_texture_buffers[tbo_index] = GetTextureBufferBinding(gpu_addr, size, format);
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}
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template <class P>
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std::pair<typename P::Buffer*, u32> BufferCache<P>::ObtainBuffer(GPUVAddr gpu_addr, u32 size,
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bool synchronize,
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bool mark_as_written,
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bool discard_downloads) {
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const std::optional<VAddr> cpu_addr = gpu_memory->GpuToCpuAddress(gpu_addr);
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if (!cpu_addr) {
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return {&slot_buffers[NULL_BUFFER_ID], 0};
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}
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const BufferId buffer_id = FindBuffer(*cpu_addr, size);
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Buffer& buffer = slot_buffers[buffer_id];
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if (synchronize) {
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// SynchronizeBuffer(buffer, *cpu_addr, size);
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SynchronizeBufferNoModified(buffer, *cpu_addr, size);
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}
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if (mark_as_written) {
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MarkWrittenBuffer(buffer_id, *cpu_addr, size);
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}
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if (discard_downloads) {
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IntervalType interval{*cpu_addr, size};
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ClearDownload(interval);
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discarded_ranges.subtract(interval);
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}
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return {&buffer, buffer.Offset(*cpu_addr)};
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}
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template <class P>
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void BufferCache<P>::FlushCachedWrites() {
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for (const BufferId buffer_id : cached_write_buffer_ids) {
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@ -862,6 +824,10 @@ bool BufferCache<P>::HasUncommittedFlushes() const noexcept {
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template <class P>
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void BufferCache<P>::AccumulateFlushes() {
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if (Settings::values.gpu_accuracy.GetValue() != Settings::GPUAccuracy::High) {
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uncommitted_ranges.clear();
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return;
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}
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if (uncommitted_ranges.empty()) {
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return;
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}
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@ -877,14 +843,12 @@ template <class P>
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void BufferCache<P>::CommitAsyncFlushesHigh() {
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AccumulateFlushes();
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for (const auto& interval : discarded_ranges) {
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common_ranges.subtract(interval);
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}
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if (committed_ranges.empty()) {
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return;
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}
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MICROPROFILE_SCOPE(GPU_DownloadMemory);
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const bool is_accuracy_normal =
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Settings::values.gpu_accuracy.GetValue() == Settings::GPUAccuracy::Normal;
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auto it = committed_ranges.begin();
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while (it != committed_ranges.end()) {
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@ -909,6 +873,9 @@ void BufferCache<P>::CommitAsyncFlushesHigh() {
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ForEachBufferInRange(cpu_addr, size, [&](BufferId buffer_id, Buffer& buffer) {
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buffer.ForEachDownloadRangeAndClear(
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cpu_addr, size, [&](u64 range_offset, u64 range_size) {
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if (is_accuracy_normal) {
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return;
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}
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const VAddr buffer_addr = buffer.CpuAddr();
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const auto add_download = [&](VAddr start, VAddr end) {
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const u64 new_offset = start - buffer_addr;
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@ -973,7 +940,12 @@ void BufferCache<P>::CommitAsyncFlushesHigh() {
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template <class P>
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void BufferCache<P>::CommitAsyncFlushes() {
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CommitAsyncFlushesHigh();
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if (Settings::values.gpu_accuracy.GetValue() == Settings::GPUAccuracy::High) {
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CommitAsyncFlushesHigh();
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} else {
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uncommitted_ranges.clear();
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committed_ranges.clear();
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}
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}
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template <class P>
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@ -1353,7 +1325,7 @@ void BufferCache<P>::UpdateIndexBuffer() {
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const auto& draw_state = maxwell3d->draw_manager->GetDrawState();
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const auto& index_array = draw_state.index_buffer;
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auto& flags = maxwell3d->dirty.flags;
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if (!flags[Dirty::IndexBuffer] && last_index_count == index_array.count) {
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if (!flags[Dirty::IndexBuffer]) {
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return;
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}
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flags[Dirty::IndexBuffer] = false;
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@ -1574,11 +1546,7 @@ void BufferCache<P>::MarkWrittenBuffer(BufferId buffer_id, VAddr cpu_addr, u32 s
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if (!is_async) {
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return;
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}
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const bool is_high_accuracy =
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Settings::values.gpu_accuracy.GetValue() == Settings::GPUAccuracy::High;
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if (is_high_accuracy) {
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uncommitted_ranges.add(base_interval);
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}
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uncommitted_ranges.add(base_interval);
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}
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template <class P>
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@ -1771,51 +1739,6 @@ bool BufferCache<P>::SynchronizeBufferImpl(Buffer& buffer, VAddr cpu_addr, u32 s
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return false;
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}
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template <class P>
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bool BufferCache<P>::SynchronizeBufferNoModified(Buffer& buffer, VAddr cpu_addr, u32 size) {
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boost::container::small_vector<BufferCopy, 4> copies;
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u64 total_size_bytes = 0;
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u64 largest_copy = 0;
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IntervalSet found_sets{};
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auto make_copies = [&] {
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for (auto& interval : found_sets) {
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const std::size_t sub_size = interval.upper() - interval.lower();
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const VAddr cpu_addr = interval.lower();
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copies.push_back(BufferCopy{
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.src_offset = total_size_bytes,
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.dst_offset = cpu_addr - buffer.CpuAddr(),
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.size = sub_size,
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});
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total_size_bytes += sub_size;
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largest_copy = std::max(largest_copy, sub_size);
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}
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const std::span<BufferCopy> copies_span(copies.data(), copies.size());
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UploadMemory(buffer, total_size_bytes, largest_copy, copies_span);
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};
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buffer.ForEachUploadRange(cpu_addr, size, [&](u64 range_offset, u64 range_size) {
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const VAddr base_adr = buffer.CpuAddr() + range_offset;
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const VAddr end_adr = base_adr + range_size;
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const IntervalType add_interval{base_adr, end_adr};
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found_sets.add(add_interval);
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});
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if (found_sets.empty()) {
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return true;
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}
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const IntervalType search_interval{cpu_addr, cpu_addr + size};
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auto it = common_ranges.lower_bound(search_interval);
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auto it_end = common_ranges.upper_bound(search_interval);
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if (it == common_ranges.end()) {
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make_copies();
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return false;
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}
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while (it != it_end) {
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found_sets.subtract(*it);
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it++;
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}
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make_copies();
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return false;
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}
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template <class P>
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void BufferCache<P>::UploadMemory(Buffer& buffer, u64 total_size_bytes, u64 largest_copy,
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std::span<BufferCopy> copies) {
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@ -77,11 +77,20 @@ bool DmaPusher::Step() {
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command_headers.resize_destructive(command_list_header.size);
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constexpr u32 MacroRegistersStart = 0xE00;
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if (dma_state.method < MacroRegistersStart) {
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memory_manager.ReadBlock(dma_state.dma_get, command_headers.data(),
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command_list_header.size * sizeof(u32));
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if (Settings::IsGPULevelHigh()) {
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memory_manager.ReadBlock(dma_state.dma_get, command_headers.data(),
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command_list_header.size * sizeof(u32));
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} else {
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memory_manager.ReadBlockUnsafe(dma_state.dma_get, command_headers.data(),
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command_list_header.size * sizeof(u32));
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}
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} else {
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memory_manager.ReadBlockUnsafe(dma_state.dma_get, command_headers.data(),
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command_list_header.size * sizeof(u32));
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const size_t copy_size = command_list_header.size * sizeof(u32);
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if (subchannels[dma_state.subchannel]) {
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subchannels[dma_state.subchannel]->current_dirty =
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memory_manager.IsMemoryDirty(dma_state.dma_get, copy_size);
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}
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memory_manager.ReadBlockUnsafe(dma_state.dma_get, command_headers.data(), copy_size);
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}
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ProcessCommands(command_headers);
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}
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@ -18,6 +18,7 @@ public:
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virtual void CallMultiMethod(u32 method, const u32* base_start, u32 amount,
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u32 methods_pending) = 0;
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bool current_dirty{};
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GPUVAddr current_dma_segment;
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};
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@ -4,6 +4,7 @@
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#include <cstring>
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#include <optional>
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#include "common/assert.h"
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#include "common/settings.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "video_core/dirty_flags.h"
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@ -14,6 +15,7 @@
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#include "video_core/rasterizer_interface.h"
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#include "video_core/textures/texture.h"
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namespace Tegra::Engines {
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using VideoCore::QueryType;
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@ -134,6 +136,8 @@ void Maxwell3D::ProcessMacro(u32 method, const u32* base_start, u32 amount, bool
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macro_addresses.push_back(current_dma_segment + i * sizeof(u32));
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}
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macro_segments.emplace_back(current_dma_segment, amount);
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current_macro_dirty |= current_dirty;
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current_dirty = false;
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// Call the macro when there are no more parameters in the command buffer
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if (is_last_call) {
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@ -141,10 +145,14 @@ void Maxwell3D::ProcessMacro(u32 method, const u32* base_start, u32 amount, bool
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macro_params.clear();
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macro_addresses.clear();
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macro_segments.clear();
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current_macro_dirty = false;
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}
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}
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void Maxwell3D::RefreshParameters() {
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void Maxwell3D::RefreshParametersImpl() {
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if (!Settings::IsGPULevelHigh()) {
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return;
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}
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size_t current_index = 0;
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for (auto& segment : macro_segments) {
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if (segment.first == 0) {
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@ -157,21 +165,6 @@ void Maxwell3D::RefreshParameters() {
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}
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}
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bool Maxwell3D::AnyParametersDirty() {
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size_t current_index = 0;
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for (auto& segment : macro_segments) {
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if (segment.first == 0) {
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current_index += segment.second;
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continue;
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}
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if (memory_manager.IsMemoryDirty(segment.first, sizeof(u32) * segment.second)) {
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return true;
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}
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current_index += segment.second;
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}
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return false;
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}
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u32 Maxwell3D::GetMaxCurrentVertices() {
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u32 num_vertices = 0;
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for (size_t index = 0; index < Regs::NumVertexArrays; ++index) {
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@ -332,7 +325,6 @@ void Maxwell3D::CallMethod(u32 method, u32 method_argument, bool is_last_call) {
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const u32 argument = ProcessShadowRam(method, method_argument);
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ProcessDirtyRegisters(method, argument);
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ProcessMethodCall(method, argument, method_argument, is_last_call);
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}
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@ -272,6 +272,7 @@ public:
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};
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union {
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u32 raw;
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BitField<0, 1, Mode> mode;
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BitField<4, 8, u32> pad;
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};
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@ -1217,10 +1218,12 @@ public:
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struct Window {
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union {
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u32 raw_1;
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BitField<0, 16, u32> x_min;
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BitField<16, 16, u32> x_max;
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};
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union {
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u32 raw_2;
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BitField<0, 16, u32> y_min;
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BitField<16, 16, u32> y_max;
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};
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@ -3090,9 +3093,16 @@ public:
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return macro_addresses[index];
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}
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void RefreshParameters();
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void RefreshParameters() {
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if (!current_macro_dirty) {
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return;
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}
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RefreshParametersImpl();
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}
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bool AnyParametersDirty();
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bool AnyParametersDirty() {
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return current_macro_dirty;
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}
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u32 GetMaxCurrentVertices();
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@ -3101,6 +3111,9 @@ public:
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/// Handles a write to the CLEAR_BUFFERS register.
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void ProcessClearBuffers(u32 layer_count);
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/// Handles a write to the CB_BIND register.
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void ProcessCBBind(size_t stage_index);
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private:
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void InitializeRegisterDefaults();
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@ -3154,12 +3167,11 @@ private:
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void ProcessCBData(u32 value);
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void ProcessCBMultiData(const u32* start_base, u32 amount);
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/// Handles a write to the CB_BIND register.
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void ProcessCBBind(size_t stage_index);
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/// Returns a query's value or an empty object if the value will be deferred through a cache.
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std::optional<u64> GetQueryResult();
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void RefreshParametersImpl();
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Core::System& system;
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MemoryManager& memory_manager;
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@ -3187,6 +3199,7 @@ private:
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bool draw_indexed{};
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std::vector<std::pair<GPUVAddr, size_t>> macro_segments;
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std::vector<GPUVAddr> macro_addresses;
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bool current_macro_dirty{};
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};
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#define ASSERT_REG_POSITION(field_name, position) \
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@ -12,6 +12,7 @@
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#include "common/assert.h"
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#include "common/fs/fs.h"
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#include "common/fs/path_util.h"
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#include "common/microprofile.h"
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#include "common/settings.h"
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#include "video_core/engines/maxwell_3d.h"
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#include "video_core/macro/macro.h"
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@ -22,6 +23,8 @@
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#include "video_core/macro/macro_jit_x64.h"
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#endif
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MICROPROFILE_DEFINE(MacroHLE, "GPU", "Execute macro hle", MP_RGB(128, 192, 192));
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namespace Tegra {
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static void Dump(u64 hash, std::span<const u32> code) {
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@ -60,6 +63,7 @@ void MacroEngine::Execute(u32 method, const std::vector<u32>& parameters) {
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if (compiled_macro != macro_cache.end()) {
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const auto& cache_info = compiled_macro->second;
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if (cache_info.has_hle_program) {
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MICROPROFILE_SCOPE(MacroHLE);
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cache_info.hle_program->Execute(parameters, method);
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} else {
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maxwell3d.RefreshParameters();
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@ -106,6 +110,7 @@ void MacroEngine::Execute(u32 method, const std::vector<u32>& parameters) {
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if (auto hle_program = hle_macros->GetHLEProgram(cache_info.hash)) {
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cache_info.has_hle_program = true;
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cache_info.hle_program = std::move(hle_program);
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MICROPROFILE_SCOPE(MacroHLE);
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cache_info.hle_program->Execute(parameters, method);
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} else {
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maxwell3d.RefreshParameters();
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@ -86,7 +86,7 @@ public:
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void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
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auto topology = static_cast<Maxwell::Regs::PrimitiveTopology>(parameters[0]);
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if (!IsTopologySafe(topology)) {
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if (!maxwell3d.AnyParametersDirty() || !IsTopologySafe(topology)) {
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Fallback(parameters);
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return;
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}
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@ -117,8 +117,8 @@ private:
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void Fallback(const std::vector<u32>& parameters) {
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SCOPE_EXIT({
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if (extended) {
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maxwell3d.CallMethod(0x8e3, 0x640, true);
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maxwell3d.CallMethod(0x8e4, 0, true);
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maxwell3d.engine_state = Maxwell::EngineHint::None;
|
||||
maxwell3d.replace_table.clear();
|
||||
}
|
||||
});
|
||||
maxwell3d.RefreshParameters();
|
||||
|
@ -127,7 +127,8 @@ private:
|
|||
const u32 vertex_first = parameters[3];
|
||||
const u32 vertex_count = parameters[1];
|
||||
|
||||
if (maxwell3d.GetMaxCurrentVertices() < vertex_first + vertex_count) {
|
||||
if (maxwell3d.AnyParametersDirty() &&
|
||||
maxwell3d.GetMaxCurrentVertices() < vertex_first + vertex_count) {
|
||||
ASSERT_MSG(false, "Faulty draw!");
|
||||
return;
|
||||
}
|
||||
|
@ -157,7 +158,7 @@ public:
|
|||
|
||||
void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
|
||||
auto topology = static_cast<Maxwell::Regs::PrimitiveTopology>(parameters[0]);
|
||||
if (!IsTopologySafe(topology)) {
|
||||
if (!maxwell3d.AnyParametersDirty() || !IsTopologySafe(topology)) {
|
||||
Fallback(parameters);
|
||||
return;
|
||||
}
|
||||
|
@ -169,7 +170,11 @@ public:
|
|||
}
|
||||
const u32 estimate = static_cast<u32>(maxwell3d.EstimateIndexBufferSize());
|
||||
const u32 base_size = std::max<u32>(minimum_limit, estimate);
|
||||
maxwell3d.regs.draw.topology.Assign(topology);
|
||||
const u32 element_base = parameters[4];
|
||||
const u32 base_instance = parameters[5];
|
||||
maxwell3d.regs.vertex_id_base = element_base;
|
||||
maxwell3d.regs.global_base_vertex_index = element_base;
|
||||
maxwell3d.regs.global_base_instance_index = base_instance;
|
||||
maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
|
||||
maxwell3d.engine_state = Maxwell::EngineHint::OnHLEMacro;
|
||||
maxwell3d.setHLEReplacementName(0, 0x640, Maxwell::HLEReplaceName::BaseVertex);
|
||||
|
@ -186,6 +191,9 @@ public:
|
|||
maxwell3d.draw_manager->DrawIndexedIndirect(topology, 0, base_size);
|
||||
maxwell3d.engine_state = Maxwell::EngineHint::None;
|
||||
maxwell3d.replace_table.clear();
|
||||
maxwell3d.regs.vertex_id_base = 0x0;
|
||||
maxwell3d.regs.global_base_vertex_index = 0x0;
|
||||
maxwell3d.regs.global_base_instance_index = 0x0;
|
||||
}
|
||||
|
||||
private:
|
||||
|
@ -195,6 +203,8 @@ private:
|
|||
const u32 element_base = parameters[4];
|
||||
const u32 base_instance = parameters[5];
|
||||
maxwell3d.regs.vertex_id_base = element_base;
|
||||
maxwell3d.regs.global_base_vertex_index = element_base;
|
||||
maxwell3d.regs.global_base_instance_index = base_instance;
|
||||
maxwell3d.dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
|
||||
maxwell3d.engine_state = Maxwell::EngineHint::OnHLEMacro;
|
||||
maxwell3d.setHLEReplacementName(0, 0x640, Maxwell::HLEReplaceName::BaseVertex);
|
||||
|
@ -205,6 +215,8 @@ private:
|
|||
parameters[3], parameters[1], element_base, base_instance, instance_count);
|
||||
|
||||
maxwell3d.regs.vertex_id_base = 0x0;
|
||||
maxwell3d.regs.global_base_vertex_index = 0x0;
|
||||
maxwell3d.regs.global_base_instance_index = 0x0;
|
||||
maxwell3d.engine_state = Maxwell::EngineHint::None;
|
||||
maxwell3d.replace_table.clear();
|
||||
}
|
||||
|
@ -253,7 +265,6 @@ public:
|
|||
return;
|
||||
}
|
||||
|
||||
maxwell3d.regs.draw.topology.Assign(topology);
|
||||
const u32 padding = parameters[3]; // padding is in words
|
||||
|
||||
// size of each indirect segment
|
||||
|
@ -335,6 +346,83 @@ private:
|
|||
u32 minimum_limit{1 << 12};
|
||||
};
|
||||
|
||||
class HLE_C713C83D8F63CCF3 final : public HLEMacroImpl {
|
||||
public:
|
||||
explicit HLE_C713C83D8F63CCF3(Engines::Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
|
||||
|
||||
void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
|
||||
maxwell3d.RefreshParameters();
|
||||
const u32 offset = (parameters[0] & 0x3FFFFFFF) << 2;
|
||||
const u32 address = maxwell3d.regs.shadow_scratch[24];
|
||||
auto& const_buffer = maxwell3d.regs.const_buffer;
|
||||
const_buffer.size = 0x7000;
|
||||
const_buffer.address_high = (address >> 24) & 0xFF;
|
||||
const_buffer.address_low = address << 8;
|
||||
const_buffer.offset = offset;
|
||||
}
|
||||
};
|
||||
|
||||
class HLE_D7333D26E0A93EDE final : public HLEMacroImpl {
|
||||
public:
|
||||
explicit HLE_D7333D26E0A93EDE(Engines::Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
|
||||
|
||||
void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
|
||||
maxwell3d.RefreshParameters();
|
||||
const size_t index = parameters[0];
|
||||
const u32 address = maxwell3d.regs.shadow_scratch[42 + index];
|
||||
const u32 size = maxwell3d.regs.shadow_scratch[47 + index];
|
||||
auto& const_buffer = maxwell3d.regs.const_buffer;
|
||||
const_buffer.size = size;
|
||||
const_buffer.address_high = (address >> 24) & 0xFF;
|
||||
const_buffer.address_low = address << 8;
|
||||
}
|
||||
};
|
||||
|
||||
class HLE_BindShader final : public HLEMacroImpl {
|
||||
public:
|
||||
explicit HLE_BindShader(Engines::Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
|
||||
|
||||
void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
|
||||
maxwell3d.RefreshParameters();
|
||||
auto& regs = maxwell3d.regs;
|
||||
const u32 index = parameters[0];
|
||||
if ((parameters[1] - regs.shadow_scratch[28 + index]) == 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
regs.pipelines[index & 0xF].offset = parameters[2];
|
||||
maxwell3d.dirty.flags[VideoCommon::Dirty::Shaders] = true;
|
||||
regs.shadow_scratch[28 + index] = parameters[1];
|
||||
regs.shadow_scratch[34 + index] = parameters[2];
|
||||
|
||||
const u32 address = parameters[4];
|
||||
auto& const_buffer = regs.const_buffer;
|
||||
const_buffer.size = 0x10000;
|
||||
const_buffer.address_high = (address >> 24) & 0xFF;
|
||||
const_buffer.address_low = address << 8;
|
||||
|
||||
const size_t bind_group_id = parameters[3] & 0x7F;
|
||||
auto& bind_group = regs.bind_groups[bind_group_id];
|
||||
bind_group.raw_config = 0x11;
|
||||
maxwell3d.ProcessCBBind(bind_group_id);
|
||||
}
|
||||
};
|
||||
|
||||
class HLE_SetRasterBoundingBox final : public HLEMacroImpl {
|
||||
public:
|
||||
explicit HLE_SetRasterBoundingBox(Engines::Maxwell3D& maxwell3d_) : HLEMacroImpl(maxwell3d_) {}
|
||||
|
||||
void Execute(const std::vector<u32>& parameters, [[maybe_unused]] u32 method) override {
|
||||
maxwell3d.RefreshParameters();
|
||||
const u32 raster_mode = parameters[0];
|
||||
auto& regs = maxwell3d.regs;
|
||||
const u32 raster_enabled = maxwell3d.regs.conservative_raster_enable;
|
||||
const u32 scratch_data = maxwell3d.regs.shadow_scratch[52];
|
||||
regs.raster_bounding_box.raw = raster_mode & 0xFFFFF00F;
|
||||
regs.raster_bounding_box.pad.Assign(scratch_data & raster_enabled);
|
||||
}
|
||||
};
|
||||
|
||||
} // Anonymous namespace
|
||||
|
||||
HLEMacro::HLEMacro(Engines::Maxwell3D& maxwell3d_) : maxwell3d{maxwell3d_} {
|
||||
|
@ -368,6 +456,26 @@ HLEMacro::HLEMacro(Engines::Maxwell3D& maxwell3d_) : maxwell3d{maxwell3d_} {
|
|||
[](Engines::Maxwell3D& maxwell3d) -> std::unique_ptr<CachedMacro> {
|
||||
return std::make_unique<HLE_MultiLayerClear>(maxwell3d);
|
||||
}));
|
||||
builders.emplace(0xC713C83D8F63CCF3ULL,
|
||||
std::function<std::unique_ptr<CachedMacro>(Engines::Maxwell3D&)>(
|
||||
[](Engines::Maxwell3D& maxwell3d) -> std::unique_ptr<CachedMacro> {
|
||||
return std::make_unique<HLE_C713C83D8F63CCF3>(maxwell3d);
|
||||
}));
|
||||
builders.emplace(0xD7333D26E0A93EDEULL,
|
||||
std::function<std::unique_ptr<CachedMacro>(Engines::Maxwell3D&)>(
|
||||
[](Engines::Maxwell3D& maxwell3d) -> std::unique_ptr<CachedMacro> {
|
||||
return std::make_unique<HLE_D7333D26E0A93EDE>(maxwell3d);
|
||||
}));
|
||||
builders.emplace(0xEB29B2A09AA06D38ULL,
|
||||
std::function<std::unique_ptr<CachedMacro>(Engines::Maxwell3D&)>(
|
||||
[](Engines::Maxwell3D& maxwell3d) -> std::unique_ptr<CachedMacro> {
|
||||
return std::make_unique<HLE_BindShader>(maxwell3d);
|
||||
}));
|
||||
builders.emplace(0xDB1341DBEB4C8AF7ULL,
|
||||
std::function<std::unique_ptr<CachedMacro>(Engines::Maxwell3D&)>(
|
||||
[](Engines::Maxwell3D& maxwell3d) -> std::unique_ptr<CachedMacro> {
|
||||
return std::make_unique<HLE_SetRasterBoundingBox>(maxwell3d);
|
||||
}));
|
||||
}
|
||||
|
||||
HLEMacro::~HLEMacro() = default;
|
||||
|
|
Loading…
Reference in New Issue