shader_ir: Correct max sizing
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d45fed3030
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cfb3db1a32
@ -163,7 +163,7 @@ enum class ParseResult : u32 {
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ParseResult ParseCode(CFGRebuildState& state, u32 address, ParseInfo& parse_info) {
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ParseResult ParseCode(CFGRebuildState& state, u32 address, ParseInfo& parse_info) {
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u32 offset = static_cast<u32>(address);
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u32 offset = static_cast<u32>(address);
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const u32 end_address = static_cast<u32>(state.program_size - 10U) * 8U;
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const u32 end_address = static_cast<u32>(state.program_size / 8U);
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const auto insert_label = ([](CFGRebuildState& state, u32 address) {
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const auto insert_label = ([](CFGRebuildState& state, u32 address) {
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auto pair = state.labels.emplace(address);
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auto pair = state.labels.emplace(address);
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@ -39,7 +39,7 @@ void ShaderIR::Decode() {
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std::memcpy(&header, program_code.data(), sizeof(Tegra::Shader::Header));
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std::memcpy(&header, program_code.data(), sizeof(Tegra::Shader::Header));
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disable_flow_stack = false;
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disable_flow_stack = false;
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const auto info = ScanFlow(program_code, program_code.size(), main_offset);
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const auto info = ScanFlow(program_code, program_size, main_offset);
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if (info) {
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if (info) {
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const auto& shader_info = *info;
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const auto& shader_info = *info;
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coverage_begin = shader_info.start;
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coverage_begin = shader_info.start;
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