cpu_detect: Add additional x86 flags and telemetry
Adds detection of additional CPU flags to cpu_detect and additions to telemetry output.
This is not exhaustive but guided by features that [dynarmic utilizes](bcfe377aaa/src/dynarmic/backend/x64/host_feature.h (L12-L33)
) as well as features that are currently utilized but not reported to telemetry(invariant_tsc). This is intended to guide future optimizations.
AVX512 in particular is broken up into its individual subsets and some other processor features such as [sha](https://en.wikipedia.org/wiki/Intel_SHA_extensions) and [gfni](https://en.wikipedia.org/wiki/AVX-512#GFNI) are added to have some forward-facing data-points.
What used to be a single `CPU_Extension_x64_AVX512` telemetry field
is also broken up into individual `CPU_Extension_x64_AVX512{F,VL,CD,...}` fields.
This commit is contained in:
parent
29a7a61806
commit
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@ -55,22 +55,50 @@ void AppendBuildInfo(FieldCollection& fc) {
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void AppendCPUInfo(FieldCollection& fc) {
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void AppendCPUInfo(FieldCollection& fc) {
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#ifdef ARCHITECTURE_x86_64
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#ifdef ARCHITECTURE_x86_64
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fc.AddField(FieldType::UserSystem, "CPU_Model", Common::GetCPUCaps().cpu_string);
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fc.AddField(FieldType::UserSystem, "CPU_BrandString", Common::GetCPUCaps().brand_string);
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const auto& caps = Common::GetCPUCaps();
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_AES", Common::GetCPUCaps().aes);
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const auto add_field = [&fc](std::string_view field_name, const auto& field_value) {
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_AVX", Common::GetCPUCaps().avx);
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fc.AddField(FieldType::UserSystem, field_name, field_value);
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_AVX2", Common::GetCPUCaps().avx2);
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};
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_AVX512", Common::GetCPUCaps().avx512);
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add_field("CPU_Model", caps.cpu_string);
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_BMI1", Common::GetCPUCaps().bmi1);
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add_field("CPU_BrandString", caps.brand_string);
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_BMI2", Common::GetCPUCaps().bmi2);
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_FMA", Common::GetCPUCaps().fma);
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add_field("CPU_Extension_x64_SSE", caps.sse);
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_FMA4", Common::GetCPUCaps().fma4);
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add_field("CPU_Extension_x64_SSE2", caps.sse2);
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_SSE", Common::GetCPUCaps().sse);
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add_field("CPU_Extension_x64_SSE3", caps.sse3);
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_SSE2", Common::GetCPUCaps().sse2);
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add_field("CPU_Extension_x64_SSSE3", caps.ssse3);
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_SSE3", Common::GetCPUCaps().sse3);
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add_field("CPU_Extension_x64_SSE41", caps.sse4_1);
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_SSSE3", Common::GetCPUCaps().ssse3);
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add_field("CPU_Extension_x64_SSE42", caps.sse4_2);
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_SSE41", Common::GetCPUCaps().sse4_1);
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fc.AddField(FieldType::UserSystem, "CPU_Extension_x64_SSE42", Common::GetCPUCaps().sse4_2);
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add_field("CPU_Extension_x64_AVX", caps.avx);
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add_field("CPU_Extension_x64_AVX_VNNI", caps.avx_vnni);
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add_field("CPU_Extension_x64_AVX2", caps.avx2);
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// Skylake-X/SP level AVX512, for compatibility with the previous telemetry field
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add_field("CPU_Extension_x64_AVX512",
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caps.avx512f && caps.avx512cd && caps.avx512vl && caps.avx512dq && caps.avx512bw);
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add_field("CPU_Extension_x64_AVX512F", caps.avx512f);
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add_field("CPU_Extension_x64_AVX512CD", caps.avx512cd);
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add_field("CPU_Extension_x64_AVX512VL", caps.avx512vl);
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add_field("CPU_Extension_x64_AVX512DQ", caps.avx512dq);
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add_field("CPU_Extension_x64_AVX512BW", caps.avx512bw);
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add_field("CPU_Extension_x64_AVX512BITALG", caps.avx512bitalg);
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add_field("CPU_Extension_x64_AVX512VBMI", caps.avx512vbmi);
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add_field("CPU_Extension_x64_AES", caps.aes);
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add_field("CPU_Extension_x64_BMI1", caps.bmi1);
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add_field("CPU_Extension_x64_BMI2", caps.bmi2);
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add_field("CPU_Extension_x64_F16C", caps.f16c);
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add_field("CPU_Extension_x64_FMA", caps.fma);
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add_field("CPU_Extension_x64_FMA4", caps.fma4);
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add_field("CPU_Extension_x64_GFNI", caps.gfni);
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add_field("CPU_Extension_x64_INVARIANT_TSC", caps.invariant_tsc);
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add_field("CPU_Extension_x64_LZCNT", caps.lzcnt);
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add_field("CPU_Extension_x64_MOVBE", caps.movbe);
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add_field("CPU_Extension_x64_PCLMULQDQ", caps.pclmulqdq);
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add_field("CPU_Extension_x64_POPCNT", caps.popcnt);
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add_field("CPU_Extension_x64_SHA", caps.sha);
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#else
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#else
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fc.AddField(FieldType::UserSystem, "CPU_Model", "Other");
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fc.AddField(FieldType::UserSystem, "CPU_Model", "Other");
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#endif
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#endif
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@ -93,10 +93,14 @@ static CPUCaps Detect() {
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caps.sse = Common::Bit<25>(cpu_id[3]);
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caps.sse = Common::Bit<25>(cpu_id[3]);
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caps.sse2 = Common::Bit<26>(cpu_id[3]);
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caps.sse2 = Common::Bit<26>(cpu_id[3]);
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caps.sse3 = Common::Bit<0>(cpu_id[2]);
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caps.sse3 = Common::Bit<0>(cpu_id[2]);
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caps.pclmulqdq = Common::Bit<1>(cpu_id[2]);
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caps.ssse3 = Common::Bit<9>(cpu_id[2]);
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caps.ssse3 = Common::Bit<9>(cpu_id[2]);
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caps.sse4_1 = Common::Bit<19>(cpu_id[2]);
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caps.sse4_1 = Common::Bit<19>(cpu_id[2]);
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caps.sse4_2 = Common::Bit<20>(cpu_id[2]);
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caps.sse4_2 = Common::Bit<20>(cpu_id[2]);
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caps.movbe = Common::Bit<22>(cpu_id[2]);
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caps.popcnt = Common::Bit<23>(cpu_id[2]);
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caps.aes = Common::Bit<25>(cpu_id[2]);
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caps.aes = Common::Bit<25>(cpu_id[2]);
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caps.f16c = Common::Bit<29>(cpu_id[2]);
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// AVX support requires 3 separate checks:
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// AVX support requires 3 separate checks:
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// - Is the AVX bit set in CPUID?
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// - Is the AVX bit set in CPUID?
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@ -112,16 +116,26 @@ static CPUCaps Detect() {
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if (max_std_fn >= 7) {
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if (max_std_fn >= 7) {
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__cpuidex(cpu_id, 0x00000007, 0x00000000);
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__cpuidex(cpu_id, 0x00000007, 0x00000000);
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// Can't enable AVX2 unless the XSAVE/XGETBV checks above passed
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// Can't enable AVX{2,512} unless the XSAVE/XGETBV checks above passed
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caps.avx2 = caps.avx && Common::Bit<5>(cpu_id[1]);
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if (caps.avx) {
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caps.avx2 = Common::Bit<5>(cpu_id[1]);
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caps.avx512f = Common::Bit<16>(cpu_id[1]);
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caps.avx512dq = Common::Bit<17>(cpu_id[1]);
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caps.avx512cd = Common::Bit<28>(cpu_id[1]);
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caps.avx512bw = Common::Bit<30>(cpu_id[1]);
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caps.avx512vl = Common::Bit<31>(cpu_id[1]);
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caps.avx512vbmi = Common::Bit<1>(cpu_id[2]);
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caps.avx512bitalg = Common::Bit<12>(cpu_id[2]);
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}
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caps.bmi1 = Common::Bit<3>(cpu_id[1]);
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caps.bmi1 = Common::Bit<3>(cpu_id[1]);
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caps.bmi2 = Common::Bit<8>(cpu_id[1]);
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caps.bmi2 = Common::Bit<8>(cpu_id[1]);
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// Checks for AVX512F, AVX512CD, AVX512VL, AVX512DQ, AVX512BW (Intel Skylake-X/SP)
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caps.sha = Common::Bit<29>(cpu_id[1]);
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if (Common::Bit<16>(cpu_id[1]) && Common::Bit<28>(cpu_id[1]) &&
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Common::Bit<31>(cpu_id[1]) && Common::Bit<17>(cpu_id[1]) &&
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caps.gfni = Common::Bit<8>(cpu_id[2]);
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Common::Bit<30>(cpu_id[1])) {
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caps.avx512 = caps.avx2;
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__cpuidex(cpu_id, 0x00000007, 0x00000001);
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}
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caps.avx_vnni = caps.avx && Common::Bit<4>(cpu_id[0]);
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}
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}
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}
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}
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@ -35,16 +35,31 @@ struct CPUCaps {
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bool ssse3 : 1;
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bool ssse3 : 1;
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bool sse4_1 : 1;
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bool sse4_1 : 1;
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bool sse4_2 : 1;
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bool sse4_2 : 1;
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bool lzcnt : 1;
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bool avx : 1;
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bool avx : 1;
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bool avx_vnni : 1;
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bool avx2 : 1;
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bool avx2 : 1;
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bool avx512 : 1;
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bool avx512f : 1;
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bool avx512dq : 1;
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bool avx512cd : 1;
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bool avx512bw : 1;
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bool avx512vl : 1;
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bool avx512vbmi : 1;
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bool avx512bitalg : 1;
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bool aes : 1;
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bool bmi1 : 1;
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bool bmi1 : 1;
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bool bmi2 : 1;
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bool bmi2 : 1;
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bool f16c : 1;
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bool fma : 1;
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bool fma : 1;
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bool fma4 : 1;
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bool fma4 : 1;
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bool aes : 1;
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bool gfni : 1;
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bool invariant_tsc : 1;
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bool invariant_tsc : 1;
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bool lzcnt : 1;
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bool movbe : 1;
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bool pclmulqdq : 1;
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bool popcnt : 1;
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bool sha : 1;
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};
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};
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/**
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/**
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@ -249,9 +249,9 @@ GMainWindow::GMainWindow()
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#ifdef ARCHITECTURE_x86_64
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#ifdef ARCHITECTURE_x86_64
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const auto& caps = Common::GetCPUCaps();
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const auto& caps = Common::GetCPUCaps();
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std::string cpu_string = caps.cpu_string;
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std::string cpu_string = caps.cpu_string;
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if (caps.avx || caps.avx2 || caps.avx512) {
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if (caps.avx || caps.avx2 || caps.avx512f) {
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cpu_string += " | AVX";
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cpu_string += " | AVX";
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if (caps.avx512) {
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if (caps.avx512f) {
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cpu_string += "512";
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cpu_string += "512";
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} else if (caps.avx2) {
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} else if (caps.avx2) {
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cpu_string += '2';
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cpu_string += '2';
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