franklinblanco
/
yuzu
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

- added CallMCR function to coprocessor HLE module 

- moved instruction decoding to coprocessor HLE module
This commit is contained in:
bunnei 2014-05-01 23:03:50 -04:00
parent c1e71ae1ac
commit f7c6302009
3 changed files with 43 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

45
src/core/arm/interpreter/armsupp.cpp
View File

@ -661,7 +661,8 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address)
void void
ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source) ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
{ {
unsigned cpab; HLE::CallMCR(instr, source);
//unsigned cpab;
////printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source); ////printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source);
//if (!CP_ACCESS_ALLOWED (state, CPNum)) { //if (!CP_ACCESS_ALLOWED (state, CPNum)) {
@ -671,29 +672,29 @@ ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source)
// return; // return;
//} //}
cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source); //cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source);
while (cpab == ARMul_BUSY) { //while (cpab == ARMul_BUSY) {
ARMul_Icycles (state, 1, 0); // ARMul_Icycles (state, 1, 0);
if (IntPending (state)) { // if (IntPending (state)) {
cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT, // cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT,
instr, 0); // instr, 0);
return; // return;
} // }
else // else
cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr, // cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr,
source); // source);
} //}
if (cpab == ARMul_CANT) { //if (cpab == ARMul_CANT) {
printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source); // printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source);
ARMul_Abort (state, ARMul_UndefinedInstrV); // ARMul_Abort (state, ARMul_UndefinedInstrV);
} //}
else { //else {
BUSUSEDINCPCN; // BUSUSEDINCPCN;
ARMul_Ccycles (state, 1, 0); // ARMul_Ccycles (state, 1, 0);
} //}
} }
/* This function does the Busy-Waiting for an MCRR instruction. */ /* This function does the Busy-Waiting for an MCRR instruction. */
@ -739,7 +740,7 @@ ARMul_MRC (ARMul_State * state, ARMword instr)
{ {
unsigned cpab; unsigned cpab;
ARMword result = HLE::CallMRC((HLE::ARM11_MRC_OPERATION)BITS(20, 27)); ARMword result = HLE::CallMRC(instr);
////printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr); ////printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
//if (!CP_ACCESS_ALLOWED (state, CPNum)) { //if (!CP_ACCESS_ALLOWED (state, CPNum)) {

16
src/core/hle/coprocessor.cpp
View File

@ -44,8 +44,18 @@ Addr GetThreadCommandBuffer() {
return CMD_BUFFER_ADDR; return CMD_BUFFER_ADDR;
} }
/// Call an MRC operation in HLE /// Call an MCR (move to coprocessor from ARM register) instruction in HLE
u32 CallMRC(ARM11_MRC_OPERATION operation) { s32 CallMCR(u32 instruction, u32 value) {
CoprocessorOperation operation = (CoprocessorOperation)((instruction >> 20) & 0xFF);
ERROR_LOG(OSHLE, "unimplemented MCR instruction=0x%08X, operation=%02X, value=%08X",
instruction, operation, value);
return -1;
}
/// Call an MRC (move to ARM register from coprocessor) instruction in HLE
s32 CallMRC(u32 instruction) {
CoprocessorOperation operation = (CoprocessorOperation)((instruction >> 20) & 0xFF);
switch (operation) { switch (operation) {
case DATA_SYNCHRONIZATION_BARRIER: case DATA_SYNCHRONIZATION_BARRIER:
@ -55,7 +65,7 @@ u32 CallMRC(ARM11_MRC_OPERATION operation) {
return GetThreadCommandBuffer(); return GetThreadCommandBuffer();
default: default:
ERROR_LOG(OSHLE, "unimplemented MRC operation 0x%02X", operation); ERROR_LOG(OSHLE, "unimplemented MRC instruction 0x%08X", instruction);
break; break;
} }
return -1; return -1;

11
src/core/hle/coprocessor.h
View File

@ -8,13 +8,16 @@
namespace HLE { namespace HLE {
/// MRC operations (ARM register from coprocessor), decoded as instr[20:27] /// Coprocessor operations
enum ARM11_MRC_OPERATION { enum CoprocessorOperation {
DATA_SYNCHRONIZATION_BARRIER = 0xE0, DATA_SYNCHRONIZATION_BARRIER = 0xE0,
CALL_GET_THREAD_COMMAND_BUFFER = 0xE1, CALL_GET_THREAD_COMMAND_BUFFER = 0xE1,
}; };
/// Call an MRC operation in HLE /// Call an MCR (move to coprocessor from ARM register) instruction in HLE
u32 CallMRC(ARM11_MRC_OPERATION operation); s32 CallMCR(u32 instruction, u32 value);
/// Call an MRC (move to ARM register from coprocessor) instruction in HLE
s32 CallMRC(u32 instruction);
} // namespace } // namespace