shader/memory: Add "using std::move"
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79970c9174
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@ -3,7 +3,9 @@
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// Refer to the license.txt file included.
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#include <algorithm>
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#include <utility>
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#include <vector>
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#include <fmt/format.h>
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#include "common/alignment.h"
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@ -16,6 +18,7 @@
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namespace VideoCommon::Shader {
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using std::move;
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using Tegra::Shader::AtomicOp;
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using Tegra::Shader::AtomicType;
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using Tegra::Shader::Attribute;
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@ -87,23 +90,22 @@ u32 GetMemorySize(Tegra::Shader::UniformType uniform_type) {
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Node ExtractUnaligned(Node value, Node address, u32 mask, u32 size) {
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Node offset = Operation(OperationCode::UBitwiseAnd, address, Immediate(mask));
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offset = Operation(OperationCode::ULogicalShiftLeft, std::move(offset), Immediate(3));
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return Operation(OperationCode::UBitfieldExtract, std::move(value), std::move(offset),
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Immediate(size));
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offset = Operation(OperationCode::ULogicalShiftLeft, move(offset), Immediate(3));
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return Operation(OperationCode::UBitfieldExtract, move(value), move(offset), Immediate(size));
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}
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Node InsertUnaligned(Node dest, Node value, Node address, u32 mask, u32 size) {
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Node offset = Operation(OperationCode::UBitwiseAnd, std::move(address), Immediate(mask));
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offset = Operation(OperationCode::ULogicalShiftLeft, std::move(offset), Immediate(3));
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return Operation(OperationCode::UBitfieldInsert, std::move(dest), std::move(value),
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std::move(offset), Immediate(size));
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Node offset = Operation(OperationCode::UBitwiseAnd, move(address), Immediate(mask));
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offset = Operation(OperationCode::ULogicalShiftLeft, move(offset), Immediate(3));
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return Operation(OperationCode::UBitfieldInsert, move(dest), move(value), move(offset),
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Immediate(size));
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}
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Node Sign16Extend(Node value) {
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Node sign = Operation(OperationCode::UBitwiseAnd, value, Immediate(1U << 15));
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Node is_sign = Operation(OperationCode::LogicalUEqual, std::move(sign), Immediate(1U << 15));
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Node is_sign = Operation(OperationCode::LogicalUEqual, move(sign), Immediate(1U << 15));
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Node extend = Operation(OperationCode::Select, is_sign, Immediate(0xFFFF0000), Immediate(0));
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return Operation(OperationCode::UBitwiseOr, std::move(value), std::move(extend));
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return Operation(OperationCode::UBitwiseOr, move(value), move(extend));
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}
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} // Anonymous namespace
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@ -420,10 +422,10 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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instr.atoms.type == AtomicType::S32 || instr.atoms.type == AtomicType::S64;
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const s32 offset = instr.atoms.GetImmediateOffset();
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Node address = GetRegister(instr.gpr8);
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address = Operation(OperationCode::IAdd, std::move(address), Immediate(offset));
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address = Operation(OperationCode::IAdd, move(address), Immediate(offset));
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SetRegister(bb, instr.gpr0,
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SignedOperation(GetAtomOperation(instr.atoms.operation), is_signed,
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GetSharedMemory(std::move(address)), GetRegister(instr.gpr20)));
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GetSharedMemory(move(address)), GetRegister(instr.gpr20)));
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break;
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}
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case OpCode::Id::AL2P: {
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