4d4f9cc104
* texture_cache/surface_params: Remove unused local variable * rasterizer_interface: Add missing documentation commentary * maxwell_dma: Remove unused rasterizer reference * video_core/gpu: Sort member declaration order to silent -Wreorder warning * fermi_2d: Remove unused MemoryManager reference * video_core: Silent unused variable warnings * buffer_cache: Silent -Wreorder warnings * kepler_memory: Remove unused MemoryManager reference * gl_texture_cache: Add missing override * buffer_cache: Add missing include * shader/decode: Remove unused variables
66 lines
2.5 KiB
C++
66 lines
2.5 KiB
C++
// Copyright 2018 yuzu Emulator Project
|
|
// Licensed under GPLv2 or any later version
|
|
// Refer to the license.txt file included.
|
|
|
|
#include "common/assert.h"
|
|
#include "common/logging/log.h"
|
|
#include "video_core/engines/fermi_2d.h"
|
|
#include "video_core/memory_manager.h"
|
|
#include "video_core/rasterizer_interface.h"
|
|
|
|
namespace Tegra::Engines {
|
|
|
|
Fermi2D::Fermi2D(VideoCore::RasterizerInterface& rasterizer) : rasterizer{rasterizer} {}
|
|
|
|
void Fermi2D::CallMethod(const GPU::MethodCall& method_call) {
|
|
ASSERT_MSG(method_call.method < Regs::NUM_REGS,
|
|
"Invalid Fermi2D register, increase the size of the Regs structure");
|
|
|
|
regs.reg_array[method_call.method] = method_call.argument;
|
|
|
|
switch (method_call.method) {
|
|
// Trigger the surface copy on the last register write. This is blit_src_y, but this is 64-bit,
|
|
// so trigger on the second 32-bit write.
|
|
case FERMI2D_REG_INDEX(blit_src_y) + 1: {
|
|
HandleSurfaceCopy();
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
void Fermi2D::HandleSurfaceCopy() {
|
|
LOG_WARNING(HW_GPU, "Requested a surface copy with operation {}",
|
|
static_cast<u32>(regs.operation));
|
|
|
|
// TODO(Subv): Only raw copies are implemented.
|
|
ASSERT(regs.operation == Operation::SrcCopy);
|
|
|
|
const u32 src_blit_x1{static_cast<u32>(regs.blit_src_x >> 32)};
|
|
const u32 src_blit_y1{static_cast<u32>(regs.blit_src_y >> 32)};
|
|
u32 src_blit_x2, src_blit_y2;
|
|
if (regs.blit_control.origin == Origin::Corner) {
|
|
src_blit_x2 =
|
|
static_cast<u32>((regs.blit_src_x + (regs.blit_du_dx * regs.blit_dst_width)) >> 32);
|
|
src_blit_y2 =
|
|
static_cast<u32>((regs.blit_src_y + (regs.blit_dv_dy * regs.blit_dst_height)) >> 32);
|
|
} else {
|
|
src_blit_x2 = static_cast<u32>((regs.blit_src_x >> 32) + regs.blit_dst_width);
|
|
src_blit_y2 = static_cast<u32>((regs.blit_src_y >> 32) + regs.blit_dst_height);
|
|
}
|
|
const Common::Rectangle<u32> src_rect{src_blit_x1, src_blit_y1, src_blit_x2, src_blit_y2};
|
|
const Common::Rectangle<u32> dst_rect{regs.blit_dst_x, regs.blit_dst_y,
|
|
regs.blit_dst_x + regs.blit_dst_width,
|
|
regs.blit_dst_y + regs.blit_dst_height};
|
|
Config copy_config;
|
|
copy_config.operation = regs.operation;
|
|
copy_config.filter = regs.blit_control.filter;
|
|
copy_config.src_rect = src_rect;
|
|
copy_config.dst_rect = dst_rect;
|
|
|
|
if (!rasterizer.AccelerateSurfaceCopy(regs.src, regs.dst, copy_config)) {
|
|
UNIMPLEMENTED();
|
|
}
|
|
}
|
|
|
|
} // namespace Tegra::Engines
|