82 lines
2.9 KiB
C++
82 lines
2.9 KiB
C++
// Copyright 2018 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "core/memory.h"
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#include "video_core/engines/maxwell_dma.h"
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#include "video_core/textures/decoders.h"
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namespace Tegra {
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namespace Engines {
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MaxwellDMA::MaxwellDMA(MemoryManager& memory_manager) : memory_manager(memory_manager) {}
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void MaxwellDMA::WriteReg(u32 method, u32 value) {
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ASSERT_MSG(method < Regs::NUM_REGS,
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"Invalid MaxwellDMA register, increase the size of the Regs structure");
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regs.reg_array[method] = value;
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#define MAXWELLDMA_REG_INDEX(field_name) \
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(offsetof(Tegra::Engines::MaxwellDMA::Regs, field_name) / sizeof(u32))
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switch (method) {
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case MAXWELLDMA_REG_INDEX(exec): {
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HandleCopy();
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break;
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}
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}
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#undef MAXWELLDMA_REG_INDEX
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}
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void MaxwellDMA::HandleCopy() {
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LOG_WARNING(HW_GPU, "Requested a DMA copy");
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const GPUVAddr source = regs.src_address.Address();
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const GPUVAddr dest = regs.dst_address.Address();
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const VAddr source_cpu = *memory_manager.GpuToCpuAddress(source);
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const VAddr dest_cpu = *memory_manager.GpuToCpuAddress(dest);
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// TODO(Subv): Perform more research and implement all features of this engine.
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ASSERT(regs.exec.enable_swizzle == 0);
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ASSERT(regs.exec.query_mode == Regs::QueryMode::None);
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ASSERT(regs.exec.query_intr == Regs::QueryIntr::None);
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ASSERT(regs.exec.copy_mode == Regs::CopyMode::Unk2);
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ASSERT(regs.src_params.pos_x == 0);
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ASSERT(regs.src_params.pos_y == 0);
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ASSERT(regs.dst_params.pos_x == 0);
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ASSERT(regs.dst_params.pos_y == 0);
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if (regs.exec.is_dst_linear == regs.exec.is_src_linear) {
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std::size_t copy_size = regs.x_count;
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// When the enable_2d bit is disabled, the copy is performed as if we were copying a 1D
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// buffer of length `x_count`, otherwise we copy a 2D buffer of size (x_count, y_count).
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if (regs.exec.enable_2d) {
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copy_size = copy_size * regs.y_count;
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}
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Memory::CopyBlock(dest_cpu, source_cpu, copy_size);
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return;
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}
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ASSERT(regs.exec.enable_2d == 1);
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u8* src_buffer = Memory::GetPointer(source_cpu);
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u8* dst_buffer = Memory::GetPointer(dest_cpu);
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if (regs.exec.is_dst_linear && !regs.exec.is_src_linear) {
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// If the input is tiled and the output is linear, deswizzle the input and copy it over.
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Texture::CopySwizzledData(regs.src_params.size_x, regs.src_params.size_y, 1, 1, src_buffer,
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dst_buffer, true, regs.src_params.BlockHeight());
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} else {
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// If the input is linear and the output is tiled, swizzle the input and copy it over.
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Texture::CopySwizzledData(regs.dst_params.size_x, regs.dst_params.size_y, 1, 1, dst_buffer,
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src_buffer, false, regs.dst_params.BlockHeight());
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}
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}
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} // namespace Engines
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} // namespace Tegra
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